search for: num_plane

...L; > + > + return 0; > +} > + > static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state) > { > struct drm_plane *plane = state->plane; > @@ -269,7 +312,7 @@ static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state) > int num_planes = fb->format->num_planes; > u32 h_subsample = 1; > u32 v_subsample = 1; > - int i; > + int i, ret; > > for (i = 0; i < num_planes; i++) > vc4_state->offsets[i] = bo->paddr + fb->offsets[i]; > @@ -292,6 +335,10 @@ static int vc4_plane_setup_clipp...

...w || !vc4_pstate->crtc_h) + return -EINVAL; + + return 0; +} + static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state) { struct drm_plane *plane = state->plane; @@ -269,7 +312,7 @@ static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state) int num_planes = fb->format->num_planes; u32 h_subsample = 1; u32 v_subsample = 1; - int i; + int i, ret; for (i = 0; i < num_planes; i++) vc4_state->offsets[i] = bo->paddr + fb->offsets[i]; @@ -292,6 +335,10 @@ static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *...

...; +} > > + > > static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state) > > { > > struct drm_plane *plane = state->plane; > > @@ -269,7 +312,7 @@ static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state) > > int num_planes = fb->format->num_planes; > > u32 h_subsample = 1; > > u32 v_subsample = 1; > > - int i; > > + int i, ret; > > > > for (i = 0; i < num_planes; i++) > > vc4_state->offsets[i] = bo->paddr + fb->offsets[i]; > > @@ -292,6 +33...

...+ buffer->base.get_sampler_view_components = nv84_video_buffer_sampler_view_components; > + buffer->base.get_surfaces = nv84_video_buffer_surfaces; > + buffer->base.interlaced = true; By storing the number of planes, will be able to demagic some constants later on buffer->num_planes = 2; > + > + memset(&templ, 0, sizeof(templ)); > + templ.target = PIPE_TEXTURE_2D_ARRAY; > + templ.depth0 = 1; > + templ.bind = PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_RENDER_TARGET; > + templ.format = PIPE_FORMAT_R8_UNORM; > + templ.width0 = align(template->wid...

..._sampler_view_components = nv84_video_buffer_sampler_view_components; >> + buffer->base.get_surfaces = nv84_video_buffer_surfaces; >> + buffer->base.interlaced = true; > By storing the number of planes, will be able to demagic some constants > later on > buffer->num_planes = 2; nvc0_video does that. I find that incredibly confusing. It's always 2, and they are of diff size. I prefer my bike-shed color :) > >> + >> + memset(&templ, 0, sizeof(templ)); >> + templ.target = PIPE_TEXTURE_2D_ARRAY; >> + templ.depth0 = 1; >>...

...ents = nv84_video_buffer_sampler_view_components; >>> + buffer->base.get_surfaces = nv84_video_buffer_surfaces; >>> + buffer->base.interlaced = true; >> By storing the number of planes, will be able to demagic some constants >> later on >> buffer->num_planes = 2; > > nvc0_video does that. I find that incredibly confusing. It's always 2, > and they are of diff size. I prefer my bike-shed color :) > >> >>> + >>> + memset(&templ, 0, sizeof(templ)); >>> + templ.target = PIPE_TEXTURE_2D_ARRAY; >...

..._cma_create_handle, > }; > > -static struct drm_fb_cma *drm_fb_cma_alloc(struct drm_device *dev, > +static struct drm_framebuffer *drm_fb_cma_alloc(struct drm_device *dev, > const struct drm_mode_fb_cmd2 *mode_cmd, > struct drm_gem_cma_object **obj, > unsigned int num_planes, const struct drm_framebuffer_funcs *funcs) > { > - struct drm_fb_cma *fb_cma; > + struct drm_framebuffer *fb; > int ret; > int i; > > - fb_cma = kzalloc(sizeof(*fb_cma), GFP_KERNEL); > - if (!fb_cma) > + fb = kzalloc(sizeof(*fb), GFP_KERNEL); > + if (!fb)...

...mada_crtc.c @@ -168,7 +168,7 @@ static void armada_drm_crtc_update(struct armada_crtc *dcrtc) void armada_drm_plane_calc_addrs(u32 *addrs, struct drm_framebuffer *fb, int x, int y) { - u32 addr = drm_fb_obj(fb)->dev_addr; + u32 addr = drm_to_armada_gem(fb->gem_objs[0])->dev_addr; int num_planes = fb->format->num_planes; int i; diff --git a/drivers/gpu/drm/armada/armada_fb.c b/drivers/gpu/drm/armada/armada_fb.c index 92e6b08ea64a..b7fd50b347d5 100644 --- a/drivers/gpu/drm/armada/armada_fb.c +++ b/drivers/gpu/drm/armada/armada_fb.c @@ -18,20 +18,12 @@ static void armada_fb_destro...

...mada_crtc.c @@ -168,7 +168,7 @@ static void armada_drm_crtc_update(struct armada_crtc *dcrtc) void armada_drm_plane_calc_addrs(u32 *addrs, struct drm_framebuffer *fb, int x, int y) { - u32 addr = drm_fb_obj(fb)->dev_addr; + u32 addr = drm_to_armada_gem(fb->gem_objs[0])->dev_addr; int num_planes = fb->format->num_planes; int i; diff --git a/drivers/gpu/drm/armada/armada_fb.c b/drivers/gpu/drm/armada/armada_fb.c index 92e6b08ea64a..b7fd50b347d5 100644 --- a/drivers/gpu/drm/armada/armada_fb.c +++ b/drivers/gpu/drm/armada/armada_fb.c @@ -18,20 +18,12 @@ static void armada_fb_destro...

...mada_crtc.c @@ -168,7 +168,7 @@ static void armada_drm_crtc_update(struct armada_crtc *dcrtc) void armada_drm_plane_calc_addrs(u32 *addrs, struct drm_framebuffer *fb, int x, int y) { - u32 addr = drm_fb_obj(fb)->dev_addr; + u32 addr = drm_to_armada_gem(fb->gem_objs[0])->dev_addr; int num_planes = fb->format->num_planes; int i; diff --git a/drivers/gpu/drm/armada/armada_fb.c b/drivers/gpu/drm/armada/armada_fb.c index 92e6b08ea64a..b7fd50b347d5 100644 --- a/drivers/gpu/drm/armada/armada_fb.c +++ b/drivers/gpu/drm/armada/armada_fb.c @@ -18,20 +18,12 @@ static void armada_fb_destro...

Hello, This is an attempt at providing generic support for underscan connector props. We already have 3 drivers defining the same underscan, underscan vborder and underscan hborder properties (amd, radeon and nouveau) and I am about to add a new one, hence my proposal to put the prop parsing code in the core and add ->underscan fields to drm_connector_state. In this v2, I also converted the

.../nouveau/nouveau_video.h b/src/gallium/drivers/nouveau/nouveau_video.h index 1d6ced0..be53758 100644 --- a/src/gallium/drivers/nouveau/nouveau_video.h +++ b/src/gallium/drivers/nouveau/nouveau_video.h @@ -10,10 +10,10 @@ struct nouveau_video_buffer { struct pipe_video_buffer base; unsigned num_planes; - struct pipe_resource *resources[3]; - struct pipe_sampler_view *sampler_view_planes[3]; - struct pipe_sampler_view *sampler_view_components[3]; - struct pipe_surface *surfaces[3]; + struct pipe_resource *resources[VL_NUM_COMPONENTS]; + struct pipe_sampler_view *sampler_...

...; /* YUV overlays have special requirements pre-NV50 */ > @@ -254,6 +322,31 @@ nouveau_framebuffer_new(struct drm_device *dev, > return -EINVAL; > } > > + info = drm_get_format_info(dev, mode_cmd); > + > + for (i = 0; i < info->num_planes; i++) { > + width = drm_format_info_plane_width(info, > + mode_cmd->width, > + i); > + height = drm_format_info_plane_height(info, > +...

...; > static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state) > > > { > > > struct drm_plane *plane = state->plane; > > > @@ -269,7 +312,7 @@ static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state) > > > int num_planes = fb->format->num_planes; > > > u32 h_subsample = 1; > > > u32 v_subsample = 1; > > > - int i; > > > + int i, ret; > > > > > > for (i = 0; i < num_planes; i++) > > > vc4_state->offsets[i] = bo->paddr + fb->...

...;); > - return false; > - } > - return true; > -} > - > int vb2_core_reqbufs(struct vb2_queue *q, enum vb2_memory memory, > unsigned int flags, unsigned int *count) > { > unsigned int num_buffers, allocated_buffers, num_planes = 0; > unsigned plane_sizes[VB2_MAX_PLANES] = { }; > - bool consistent_mem = true; > unsigned int i; > int ret; > > - if (flags & V4L2_FLAG_MEMORY_NON_CONSISTENT) > - consistent_mem = false; > - > if (q->st...

This series modifies the NV5x+ nouveau display backends to advertise appropriate format modifiers on their display planes in atomic mode setting blobs. Corresponding modifications to Mesa/userspace are available on the Mesa-dev mailing list as the series: nouveau: Improved format modifier support I've tested this on Tesla, Kepler, Pascal, and Turing-class hardware using various formats

...+ return -EINVAL; > + } > + } else { > + tile_mode = nvbo->mode; > + kind = nvbo->kind; > + } > + > info = drm_get_format_info(dev, mode_cmd); > > for (i = 0; i < info->num_planes; i++) { > @@ -332,11 +390,11 @@ nouveau_framebuffer_new(struct drm_device *dev, > mode_cmd->height, > i); > > - if (nvbo->kind) { > + if (...

This series modifies the NV5x+ nouveau display backends to advertise appropriate format modifiers on their display planes in atomic mode setting blobs. Corresponding modifications to Mesa/userspace are available here: https://gitlab.freedesktop.org/cubanismo/mesa/tree/nouveau_work But those need a bit of cleanup before they're ready to submit. I've tested this on Tesla, Kepler, Pascal,

This series modifies the NV5x+ nouveau display backends to advertise appropriate format modifiers on their display planes in atomic mode setting blobs. Corresponding modifications to Mesa/userspace are available on the Mesa-dev gitlab merge request 3724: https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3724 I've tested this on Tesla, Kepler, Pascal, and Turing-class hardware using

This series modifies the NV5x+ nouveau display backends to advertise appropriate format modifiers on their display planes in atomic mode setting blobs. Corresponding modifications to Mesa/userspace are available on the Mesa-dev gitlab merge request 3724: https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3724 I've tested this on Tesla, Kepler, Pascal, and Turing-class hardware using