search for: null_frag

...ow example. Consider FMA3 pattern (simplified). let Constraints = "$src1 = $dst" in { multiclass fma3s_rm<bits<8> opc, string OpcodeStr, X86MemOperand x86memop, RegisterClass RC, ValueType OpVT, PatFrag mem_frag, SDPatternOperator OpNode = null_frag> { def r : FMA3<opc, MRMSrcReg, (outs RC:$dst), (ins RC:$src1, RC:$src2, RC:$src3), !strconcat(OpcodeStr, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"), [(set RC:$dst, (...

...tern > (simplified). > > let Constraints = "$src1 = $dst" in { > multiclass fma3s_rm<bits<8> opc, string OpcodeStr, X86MemOperand x86memop, > RegisterClass RC, ValueType OpVT, PatFrag mem_frag, > SDPatternOperator OpNode = null_frag> { > > def r : FMA3<opc, MRMSrcReg, (outs RC:$dst), > (ins RC:$src1, RC:$src2, RC:$src3), > !strconcat(OpcodeStr, > "\t{$src3, $src2, $dst|$dst, $src2, $src3}"), > [(set RC...

You've unfortunately chosen a complex example. Your second question is needs be answered first. null_frag causes the pattern to be dropped. Now having covered that the reason the operands are in the order they are is because the only instruction that doesn't use null_frag is this one defm r213 : fma3s_rm<opc213, !strconcat(OpStr, !strconcat("213", PackTy)), x86me...

What is the purpose of tablegen created files for fast-isel? If I make the following change to Makefile in lib/Target/Mips BUILT_SOURCES = MipsGenRegisterInfo.inc MipsGenInstrInfo.inc \ MipsGenAsmWriter.inc MipsGenCodeEmitter.inc \ MipsGenDAGISel.inc MipsGenCallingConv.inc \ - MipsGenSubtargetInfo.inc MipsGenMCCodeEmitter.inc \ +

...012,7 @@ defm BUFFER_ATOMIC_SWAP : MUBUF_Atomic < > mubuf<0x30, 0x40>, "buffer_atomic_swap", VGPR_32, i32, atomic_swap_global > >; > defm BUFFER_ATOMIC_CMPSWAP : MUBUF_Atomic < > - mubuf<0x31, 0x41>, "buffer_atomic_cmpswap", VReg_64, v2i32, null_frag > + mubuf<0x31, 0x41>, "buffer_atomic_cmpswap", VReg_64, v2i32, SIcmp_swap > >; > defm BUFFER_ATOMIC_ADD : MUBUF_Atomic < > mubuf<0x32, 0x42>, "buffer_atomic_add", VGPR_32, i32, atomic_add_global > diff --git a/test/CodeGen/AMDGPU/global_at...

Hi Tom, Matt, I'm working on a project that needs few coherent atomic operations (HSA mode: load, store, compare-and-swap) for std::atomic_uint in HCC. the attached patch implements atomic compare and swap for SI+ (untested). I tried to stay within what was available, but there are few issues that I was unsure how to address: 1.) it currently uses v2i32 for both input and output. This

...[(directStore (dstType (OpNode srcAReg:$srcA)), addr16:$dstD)]>; def MEM_MEM : SetADIn<asmstr, memhx, memhx, [(directStore (dstType (OpNode (srcAType (load addr16:$srcA)))), addr16:$dstD)]>; } defm MOV16Copy_ : AD<"mov16", null_frag, GPRBaseRegs, GPRBaseRegs, i16, i16, simm16, immSExt16x>; On Tue, Aug 25, 2015 at 1:02 PM, Ryan Taylor <ryta1203 at gmail.com> wrote: > Quentin, > > 1. I'll take a look, it's also picking the reg class by the > SimpleValueType and then getting the common subclass. C...

...e (OpNode > srcAReg:$srcA)), addr16:$dstD)]>; > def MEM_MEM : SetADIn<asmstr, memhx, memhx, > [(directStore (dstType (OpNode (srcAType > (load addr16:$srcA)))), addr16:$dstD)]>; > } > > defm MOV16Copy_ : AD<"mov16", null_frag, GPRBaseRegs, GPRBaseRegs, > i16, i16, simm16, immSExt16x>; > > > What is defining VReg? > It is AD or is it MOV16Copy? > > Also what are the arguments of the multiclass AD that you match? > > > On Tue, Aug 25, 2015 at 1:02 PM, Ryan Taylor <ryta1203 at gmail.com&...

...srcA)), addr16:$dstD)]>; >> def MEM_MEM : SetADIn<asmstr, memhx, memhx, >> [(directStore (dstType (OpNode (srcAType >> (load addr16:$srcA)))), addr16:$dstD)]>; >> } >> >> defm MOV16Copy_ : AD<"mov16", null_frag, GPRBaseRegs, GPRBaseRegs, >> i16, i16, simm16, immSExt16x>; >> >> >> What is defining VReg? >> It is AD or is it MOV16Copy? >> >> Also what are the arguments of the multiclass AD that you match? >> >> >> On Tue, Aug 25, 2015 at 1:02 PM...

...t;; >>> def MEM_MEM : SetADIn<asmstr, memhx, memhx, >>> [(directStore (dstType (OpNode (srcAType >>> (load addr16:$srcA)))), addr16:$dstD)]>; >>> } >>> >>> defm MOV16Copy_ : AD<"mov16", null_frag, GPRBaseRegs, GPRBaseRegs, >>> i16, i16, simm16, immSExt16x>; >>> >>> >>> What is defining VReg? >>> It is AD or is it MOV16Copy? >>> >>> Also what are the arguments of the multiclass AD that you match? >>> >>> >...

...def MEM_MEM : SetADIn<asmstr, memhx, memhx, >>>> [(directStore (dstType (OpNode (srcAType >>>> (load addr16:$srcA)))), addr16:$dstD)]>; >>>> } >>>> >>>> defm MOV16Copy_ : AD<"mov16", null_frag, GPRBaseRegs, >>>> GPRBaseRegs, i16, i16, simm16, immSExt16x>; >>>> >>>> >>>> What is defining VReg? >>>> It is AD or is it MOV16Copy? >>>> >>>> Also what are the arguments of the multiclass AD that you match? &g...

Hi Ryan, > On Aug 24, 2015, at 6:49 PM, Ryan Taylor <ryta1203 at gmail.com> wrote: > > Quentin, > > I apologize for the spamming here but in getVR (where VReg is assigned an RC), it calls: > > const TargetRegisterClass *RC = TLI->getRegClassFor(Op.getSimpleValueType()); > VReg = MRI->createVirtualRegister(RC); > > My question is why is it using the