search for: nrvo

Displaying 7 results from an estimated 7 matches for "nrvo".

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2017 Sep 07
2
RFC: Introduce DW_OP_LLVM_memory to describe variables in memory with dbg.value
...re general > expression support, etc. (hilariously, what was there before was even more > awesome: we encoded the type of the parameter in the DWARF as T& instead of > T... literally changing the signature of the function... ) > Awesome, Bob just did the same thing for CodeView for NRVO in r312034, because we don't have DW_OP_deref. > Either LLVM_memory or stack_value approaches would remove the prepending > issues & I agree getting rid of the ad-hoc/separate 'indirect' flag is > good, just haggling over how best to do that. > > >> We modify...
2018 Apr 02
0
LLVM Weekly - #222, Apr 2nd 2018
...ssembly output will now use .set instead of = when printing an assignment. [r328635](http://reviews.llvm.org/rL328635). * Rudimentary support was added for auto-vectorisation for Hexagon's HVX. [r328639](http://reviews.llvm.org/rL328639). ## Clang commits * Named return value optimisation (NRVO) was generalised to cover C structs. [r328809](http://reviews.llvm.org/rL328809). * The Clang analyzer will now avoid modeling C++17 constructors that aren't fully supported. [r328893](http://reviews.llvm.org/rL328893). ## Other project commits * A new summarizeStats.py utility was added to...
2014 Nov 24
3
[LLVMdev] bx instruction getting generated in arm assembly for O1
Hi Mayur, > On 24 Nov 2014, at 07:00, MAYUR PANDEY <mayur.p at samsung.com> wrote: > In the assembly generated with O0, we are getting the "blx" instruction whereas with O1 we get "bx" (in 3.4.2 we used to get "blx" for both O0 and O1). > > Is this because of this patch: [llvm] r214959 - ARM: do not generate BLX instructions on Cortex-M CPUs
2010 Jul 17
1
[LLVMdev] Tool for run-time code generation?
...on than the LLVM IR, it seems there should be some > optimizations that would be easy to do in Clang, but > difficult/impossible to do in LLVM. No? Not even for C++? Yes. Copy constructor elimination is permitted by C++ even though it may change the visible behaviour of the program. I think NRVO is also done in the frontend. The sterling example is type-based alias analysis (which most people know of as -fstrict-aliasing in GCC). C++ has rules which state that sometimes pointers can't alias depending on their types. The LLVM type system is not the C++ type system so we can't j...
2010 Jul 16
6
[LLVMdev] Tool for run-time code generation?
Using C++ code, I would like to generate code at run-time (the same way .NET code can use dynamic methods or compiled expressions) in order to obtain very high performance code (to read binary data records whose formats are only known at run-time.) I need to target x86 (Win32) and ARM (WinCE). Can LLVM be used for this purpose, or would something else work better? Are there any open-source
2011 Dec 15
2
[LLVMdev] llvm/clang test failures on powerpc-darwin8
...eredBuiltins.c Clang : : CodeGen/bitfield-promote.c Clang : : CodeGenCXX/2005-02-19-UnnamedVirtualThunkArgument.cpp Clang : : CodeGenCXX/conditional-expr-lvalue.cpp Clang : : CodeGenCXX/cxx0x-delegating-ctors.cpp Clang : : CodeGenCXX/expr.cpp Clang : : CodeGenCXX/nrvo.cpp Clang : : CodeGenCXX/throw-expressions.cpp Clang : : CodeGenCXX/vtable-debug-info.cpp Clang : : CodeGenObjC/arc-ivar-layout.m Clang : : CodeGenObjC/debug-info-class-extension.m Clang : : CodeGenObjC/debug-info-class-extension2.m Clang : : CodeGenObjC/debug-in...
2017 Sep 07
2
RFC: Introduce DW_OP_LLVM_memory to describe variables in memory with dbg.value
On Wed, Sep 6, 2017 at 5:01 PM, David Blaikie <dblaikie at gmail.com> wrote: > On Wed, Sep 6, 2017 at 2:01 PM Reid Kleckner <rnk at google.com> wrote: > >> On Wed, Sep 6, 2017 at 10:01 AM, David Blaikie <dblaikie at gmail.com> >> wrote: >> >>> I guess you described this already, but talking it through for >>> myself/maybe others will