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Nicholas Piggin <npiggin at gmail.com> writes: > Signed-off-by: Nicholas Piggin <npiggin at gmail.com> > --- > arch/powerpc/include/asm/paravirt.h | 28 ++++++++ > arch/powerpc/include/asm/qspinlock.h | 66 +++++++++++++++++++ > arch/powerpc/include/asm/qspinlock_paravirt.h | 7...

Nicholas Piggin <npiggin at gmail.com> writes: > Signed-off-by: Nicholas Piggin <npiggin at gmail.com> > --- > arch/powerpc/include/asm/paravirt.h | 28 ++++++++ > arch/powerpc/include/asm/qspinlock.h | 66 +++++++++++++++++++ > arch/powerpc/include/asm/qspinlock_paravirt.h | 7...

Nicholas Piggin <npiggin at gmail.com> writes: > These have shown significantly improved performance and fairness when > spinlock contention is moderate to high on very large systems. > > [ Numbers hopefully forthcoming after more testing, but initial > results look good ] Would be good to have somet...

v3 is updated to use __pv_queued_spin_unlock, noticed by Waiman (thank you). Thanks, Nick Nicholas Piggin (6): powerpc/powernv: must include hvcall.h to get PAPR defines powerpc/pseries: move some PAPR paravirt functions to their own file powerpc: move spinlock implementation to simple_spinlock powerpc/64s: implement queued spinlocks and rwlocks powerpc/pseries: implement paravirt

v3 is updated to use __pv_queued_spin_unlock, noticed by Waiman (thank you). Thanks, Nick Nicholas Piggin (6): powerpc/powernv: must include hvcall.h to get PAPR defines powerpc/pseries: move some PAPR paravirt functions to their own file powerpc: move spinlock implementation to simple_spinlock powerpc/64s: implement queued spinlocks and rwlocks powerpc/pseries: implement paravirt

Nick Piggin <npiggin@suse.de> wrote: > > Also, for non-wb memory. I don't think the Intel document referenced > says anything about this, but the AMD document says that loads can pass > loads (page 8, rule b). > > This is why our rmb() is still an lfence. BTW, Xen (in particular, the code in...

Nick Piggin <npiggin@suse.de> wrote: > > Also, for non-wb memory. I don't think the Intel document referenced > says anything about this, but the AMD document says that loads can pass > loads (page 8, rule b). > > This is why our rmb() is still an lfence. BTW, Xen (in particular, the code in...

Signed-off-by: Nick Piggin <npiggin@suse.de> -- Index: linux-2.6/fs/btrfs/compression.c =================================================================== --- linux-2.6.orig/fs/btrfs/compression.c +++ linux-2.6/fs/btrfs/compression.c @@ -478,7 +478,7 @@ static noinline int add_ra_bio_pages(str goto next; } - page = allo...

On 7/9/20 6:53 AM, Michael Ellerman wrote: > Nicholas Piggin <npiggin at gmail.com> writes: > >> Signed-off-by: Nicholas Piggin <npiggin at gmail.com> >> --- >> arch/powerpc/include/asm/paravirt.h | 28 ++++++++ >> arch/powerpc/include/asm/qspinlock.h | 66 +++++++++++++++++++ >> arch/powerpc/include/as...

v2 is updated to account for feedback from Will, Peter, and Waiman (thank you), and trims off a couple of RFC and unrelated patches. Thanks, Nick Nicholas Piggin (6): powerpc/powernv: must include hvcall.h to get PAPR defines powerpc/pseries: move some PAPR paravirt functions to their own file powerpc: move spinlock implementation to simple_spinlock powerpc/64s: implement queued

On 7/3/20 3:35 AM, Nicholas Piggin wrote: > Signed-off-by: Nicholas Piggin <npiggin at gmail.com> > --- > arch/powerpc/include/asm/paravirt.h | 28 ++++++++++ > arch/powerpc/include/asm/qspinlock.h | 55 +++++++++++++++++++ > arch/powerpc/include/asm/qspinlock_paravirt.h | 5 ++ > arch/powerpc/platforms/pseries/Kconfig | 5 ++ >...

This series adds an option to use queued spinlocks for powerpc, and makes it the default for the Book3S-64 subarch. This effort starts with the generic code so it's very simple but still very performant. There are optimisations that can be made to slowpaths, but I think it's better to attack those incrementally if/when we find things, and try to add the improvements to generic code as

Updated with everybody's feedback (thanks all), and more performance results. What I've found is I might have been measuring the worst load point for the paravirt case, and by looking at a range of loads it's clear that queued spinlocks are overall better even on PV, doubly so when you look at the generally much improved worst case latencies. I have defaulted it to N even though

There is no need for rmb(), this allows faster lwsync here. Signed-off-by: Nicholas Piggin <npiggin at gmail.com> --- arch/powerpc/lib/locks.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/lib/locks.c b/arch/powerpc/lib/locks.c index 6440d5943c00..47a530de733e 100644 --- a/arch/powerpc/lib/locks.c +++ b/arch/powerpc/lib/locks.c @@ -30,7 +30,7 @@ void spl...

An include goes away in future patches which breaks compilation without this. Signed-off-by: Nicholas Piggin <npiggin at gmail.com> --- arch/powerpc/platforms/powernv/pci-ioda-tce.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/powerpc/platforms/powernv/pci-ioda-tce.c b/arch/powerpc/platforms/powernv/pci-ioda-tce.c index f923359d8afc..8eba6ece7808 100644 --- a/arch/powerpc/platforms/powernv/pci-ioda...

This implements smp_cond_load_relaed with the slowpath busy loop using the preferred SMT priority pattern. Signed-off-by: Nicholas Piggin <npiggin at gmail.com> --- arch/powerpc/include/asm/barrier.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/powerpc/include/asm/barrier.h b/arch/powerpc/include/asm/barrier.h index 123adcefd40f..9b4671d38674 100644 --- a/arch/powerpc/include/asm/barrier.h +++ b/arch/powerpc/in...

...contended()] >> Signed-off-by: Michel Lespinasse <walken at google.com> >> Cc: Hugh Dickins <hughd at google.com> >> Cc: Rik van Riel <riel at redhat.com> >> Cc: Peter Zijlstra <peterz at infradead.org> >> Cc: Nick Piggin <npiggin at kernel.dk> >> Cc: KOSAKI Motohiro <kosaki.motohiro at jp.fujitsu.com> >> Cc: Ingo Molnar <mingo at elte.hu> >> Cc: "H. Peter Anvin" <hpa at zytor.com> >> Cc: Thomas Gleixner <tglx at linutronix.de> >> Cc: Davi...

...el at jms.id.au> Cc: Karol Herbst <karolherbst at gmail.com> Cc: Masami Hiramatsu <mhiramat at kernel.org> Cc: Maxime Coquelin <mcoquelin.stm32 at gmail.com> Cc: Michael Ellerman <mpe at ellerman.id.au> Cc: Naveen N Rao <naveen at kernel.org> Cc: Nicholas Piggin <npiggin at gmail.com> Cc: Nouveau <nouveau at lists.freedesktop.org> Cc: Pekka Paalanen <ppaalanen at gmail.com> Cc: Peter Zijlstra <peterz at infradead.org> Cc: Rafael J. Wysocki <rafael at kernel.org> Cc: Russell King <linux at armlinux.org.uk> Cc: Steven Rostedt (Google)...

...el at jms.id.au> Cc: Karol Herbst <karolherbst at gmail.com> Cc: Masami Hiramatsu <mhiramat at kernel.org> Cc: Maxime Coquelin <mcoquelin.stm32 at gmail.com> Cc: Michael Ellerman <mpe at ellerman.id.au> Cc: Naveen N Rao <naveen at kernel.org> Cc: Nicholas Piggin <npiggin at gmail.com> Cc: Nouveau <nouveau at lists.freedesktop.org> Cc: Pekka Paalanen <ppaalanen at gmail.com> Cc: Peter Zijlstra <peterz at infradead.org> Cc: Rafael J. Wysocki <rafael at kernel.org> Cc: Russell King <linux at armlinux.org.uk> Cc: Steven Rostedt (Google)...

Signed-off-by: Nicholas Piggin <npiggin at gmail.com> --- arch/powerpc/include/asm/paravirt.h | 61 +++++++++++++++++++++++++++++ arch/powerpc/include/asm/spinlock.h | 24 +----------- arch/powerpc/lib/locks.c | 12 +++--- 3 files changed, 68 insertions(+), 29 deletions(-) create mode 100644 arch/powerpc/include/asm/parav...