search for: nph

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2010 Dec 17
0
[LLVMdev] Branch delay slots broken.
...yout = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-n32" target triple = "mips-ellcc-unknown" define i8* @memset(i8* %m, i32 %c, i32 %n) nounwind { entry: %tobool5 = icmp eq i32 %n, 0 br i1 %tobool5, label %while.end, label %bb.nph bb.nph: ; preds = %entry %conv = trunc i32 %c to i8 br label %while.cond while.cond: ; preds = %while.cond, %bb.nph %indvar = phi i32 [ 0, %bb.nph ], [ %indvar.next, %while.cond ] %s.07 = getelementptr i8...
2010 Dec 17
2
[LLVMdev] Branch delay slots broken.
Hi Richard, > You changes work for me also. I applied something similar to the Mips CG > and they worked there also. Thanks again. I can't reproduce the same problem here for Mips using clang, could you please attach the bitcode you used? Thanks -- Bruno Cardoso Lopes http://www.brunocardoso.cc
2008 Oct 01
2
[LLVMdev] complex branching generation
...entry: %tobool3 = fcmp une float %x, 0.000000e+000 ; <i1> [#uses=1] %tobool24 = fcmp une float %y, 0.000000e+000 ; <i1> [#uses=2] %or.cond5 = and i1 %tobool3, %tobool24 ; <i1> [#uses=1] br i1 %or.cond5, label %bb.nph, label %whileexit bb.nph: ; preds = %entry br i1 %tobool24, label %whilebody.us, label %whilebody whilebody.us: ; preds = %whilebody.us, %bb.nph ...code here... br i1 %phitmp, label %whilebody.us, label %whileexit whilebody: ; preds = %b...
2009 Oct 13
0
[LLVMdev] Detecting reduction operations
...ome initial work on > dependence analysis, but it is still pretty young. We also have support for > dependence between memory operations that are not loop aware. > > -Chris I think the dependence analysis will have to be loop aware. For example: bb: %indvar = phi i64 [ 0, %bb.nph ], [ %indvar.next, %bb ] %sum = phi i32 [ 0, %bb.nph ], [ %3, %bb ] %1 = getelementptr i32* %X, i64 %indvar %2 = load i32* %1, align 4 %3 = add i32 %2, %sum %indvar.next = add i64 %indvar, 1 %exitcond = icmp eq i64 %indvar.next, %tmp. br i1 %e...
2009 Oct 12
3
[LLVMdev] Detecting reduction operations
On Oct 12, 2009, at 4:01 PM, Scott Ricketts wrote: > To be more specific, it would be helpful to have some utilities for > finding dependencies (true, output, and anti-). Where is a good place > to start for this kind of analysis? Hi Scott, Do you mean loop carried dependencies? There is some initial work on dependence analysis, but it is still pretty young. We also have support
2015 Apr 28
2
[LLVMdev] alias set collapse and LICM
On Mon, Apr 27, 2015 at 4:21 PM, Daniel Berlin <dberlin at dberlin.org> wrote: > You can't win here (believe me, i've tried, and better people than me have > tried, for years :P). > No matter what you do, the partitioning will never be 100% precise. The > only way to solve that in general is to pairwise query over the > partitioning. > > Your basic problem is
2008 Oct 01
0
[LLVMdev] complex branching generation
...float %x, 0.000000e+000 ; <i1> > [#uses=1] > > %tobool24 = fcmp une float %y, 0.000000e+000 ; <i1> > [#uses=2] > > %or.cond5 = and i1 %tobool3, %tobool24 ; <i1> [#uses=1] > > br i1 %or.cond5, label %bb.nph, label %whileexit > > > > bb.nph: ; preds = %entry > > br i1 %tobool24, label %whilebody.us, label %whilebody > > > > whilebody.us: ; preds = %whilebody.us, %bb.nph > > …code here… > > br i1 %phitmp, label %whilebody.us, la...
2006 Jan 12
1
"infinite recursion" in do.call when lme4 loaded only
...60 seconds. Memory used increases beyond bonds in task manager. -- I tested a few S3 based packages (MASS, nlme) and did not get similar problems Current workaround: do lme4-processing in a separate program. ------ #library(lme4) # uncomment this to see the problem np <- 12 nq <- 20 nph <- 3 nrep <- 30 grd <- expand.grid(Pat=as.factor(1:np), Q=as.factor(1:nq), Phase=as.factor(1:nph)) df <- with (grd, data.frame(Pat=Pat,Q=Q,Phase=Phase,Resp = rnorm(np*nq*nph*nrep))) score <- function(x) { data.frame(Pat=x$Pat[1],Phase=x$Phase[1],Q=x$Q[1],s...
2006 Jan 12
1
"infinite recursion" in do.call when lme4 loaded only
...60 seconds. Memory used increases beyond bonds in task manager. -- I tested a few S3 based packages (MASS, nlme) and did not get similar problems Current workaround: do lme4-processing in a separate program. ------ #library(lme4) # uncomment this to see the problem np <- 12 nq <- 20 nph <- 3 nrep <- 30 grd <- expand.grid(Pat=as.factor(1:np), Q=as.factor(1:nq), Phase=as.factor(1:nph)) df <- with (grd, data.frame(Pat=Pat,Q=Q,Phase=Phase,Resp = rnorm(np*nq*nph*nrep))) score <- function(x) { data.frame(Pat=x$Pat[1],Phase=x$Phase[1],Q=x$Q[1],s...
2010 Dec 18
2
[LLVMdev] Branch delay slots broken.
...2-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-n32" > target triple = "mips-ellcc-unknown" > > define i8* @memset(i8* %m, i32 %c, i32 %n) nounwind { > entry: >  %tobool5 = icmp eq i32 %n, 0 >  br i1 %tobool5, label %while.end, label %bb.nph > > bb.nph:                                           ; preds = %entry >  %conv = trunc i32 %c to i8 >  br label %while.cond > > while.cond:                                       ; preds = %while.cond, > %bb.nph >  %indvar = phi i32 [ 0, %bb.nph ], [ %indvar.next, %while.con...
2010 Jun 29
0
[LLVMdev] Confuse on getSCEVAtScope
On Jun 29, 2010, at 7:08 AM, ether zhhb wrote: > > why computeSCEVAtScope not try to get the operands in the current > scope like the function do with SCEVCommutativeExpr, like: > > if (const SCEVAddRecExpr *AddRec = dyn_cast<SCEVAddRecExpr>(V)) { > if (!L || !AddRec->getLoop()->contains(L)) { > ... > // Then, evaluate the AddRec. >
2009 Aug 28
1
[LLVMdev] va_arg
...ag], align 8 ; <[1 x %struct.__va_list_tag]*> [#uses=4] %list12 = bitcast [1 x %struct.__va_list_tag]* %list to i8* ; <i8*> [#uses=2] call void @llvm.va_start(i8* %list12) %0 = icmp sgt i32 %n, 0 ; <i1> [#uses=1] br i1 %0, label %bb.nph, label %bb7 bb.nph: ; preds = %entry %1 = getelementptr [1 x %struct.__va_list_tag]* %list, i64 0, i64 0, i32 0 ; <i32*> [#uses=2] %2 = getelementptr [1 x %struct.__va_list_tag]* %list, i64 0, i64 0, i32 3 ; <i8**> [#uses=1] %3...
2010 Jun 29
2
[LLVMdev] Confuse on getSCEVAtScope
hi all, i have SCEVAddRec {{(32 + @edge.8265),+,32}<Loop0>,+,4}<Loop1> where Loop0 and Loop1 are brothers (loops at the same level of the loopnest), and Loop0 have a computable backedge taken count. when i call getSCEVAtScope({{(32 + @edge.8265),+,32}<Loop0>,+,4}<Loop1> , Loop1), it just give me a {{(32 + @edge.8265),+,32}<Loop0>,+,4}<Loop1>, instead of
2010 May 28
4
[LLVMdev] Combining Branch Statements - Missing Optimization Pass?
...easy way to add a createMachineFunctionPrinterPass pass to the ExecutionEngine's JIT so that it will print out the machine code after all the optimizations have been done and the code has been generated for MachineCodeEmission? Thank you in advance, Curtis define void @main() nounwind { bb.nph: br label %loop loop: ; preds = %bb.nph, %endif15 %lsr.iv = phi i32 [ 1, %bb.nph ], [ %lsr.iv.next, %endif15 ] ; <i32> [#uses=4] %fp = sitofp i32 %lsr.iv to double ; <double> [#uses=1] %r_fmul = fmul double %fp, 3.151900e...
2009 Oct 13
1
[LLVMdev] Detecting reduction operations
...eductions like this, just walk the SSA graph starting from the PHIs in the loop header. The code should look very similar to how LoopInfo identifies the canonical induction variable for a loop, it should not be difficult to write. -Chris > > bb: > %indvar = phi i64 [ 0, %bb.nph ], [ %indvar.next, %bb ] > %sum = phi i32 [ 0, %bb.nph ], [ %3, %bb ] > %1 = getelementptr i32* %X, i64 %indvar > %2 = load i32* %1, align 4 > %3 = add i32 %2, %sum > %indvar.next = add i64 %indvar, 1 > %exitcond = icmp eq i64 %indvar.next...
2010 May 28
0
[LLVMdev] Combining Branch Statements - Missing Optimization Pass?
...rPass pass to the ExecutionEngine's JIT so that it will print out the machine code after all the optimizations have been done and the code has been generated for MachineCodeEmission? > > Thank you in advance, > > Curtis > > > > define void @main() nounwind { > bb.nph: > br label %loop > > loop: ; preds = %bb.nph, %endif15 > %lsr.iv = phi i32 [ 1, %bb.nph ], [ %lsr.iv.next, %endif15 ] ; <i32> [#uses=4] > %fp = sitofp i32 %lsr.iv to double ; <double> [#uses=1] > %r_fmu...
2010 Nov 07
0
[LLVMdev] Hoisting elements of array argument into registers
...2]* %sp, i64 0, i64 1 store i32 %a, i32* %1, align 4 %2 = getelementptr inbounds [4 x i32]* %sp, i64 0, i64 2 store i32 0, i32* %2, align 4 %3 = getelementptr inbounds [4 x i32]* %sp, i64 0, i64 3 store i32 0, i32* %3, align 4 %4 = icmp eq i32 %a, 0 br i1 %4, label %wf.exit, label %bb.nph.i bb.nph.i: ; preds = %entry %.promoted1.i = load i32* %1, align 4 %tmp12.i = add i32 %a, -1 %tmp13.i = zext i32 %tmp12.i to i33 %tmp14.i = add i32 %a, -2 %tmp15.i = zext i32 %tmp14.i to i33 %tmp16.i = mul i33 %tmp13.i, %tmp15.i %tmp17.i = lshr...
2010 Nov 23
1
[LLVMdev] Unrolling loops into constant-time expressions
...e one loop into a constant-time expression, like here: int loop(int x) { int ret = 0; for(int i = 0; i < x; i++) { ret += 1+i*i + i*(i+2); } return ret; } generates: define i32 @loop(i32 %x) nounwind readnone { %1 = icmp sgt i32 %x, 0 br i1 %1, label %bb.nph, label %3 bb.nph: ; preds = %0 %tmp4 = add i32 %x, -1 %tmp6 = add i32 %x, -2 %tmp16 = add i32 %x, -3 %tmp7 = zext i32 %tmp6 to i33 %tmp5 = zext i32 %tmp4 to i33 %tmp17 = zext i32 %tmp16 to i33 %tmp15 = mul i33 %tmp5, %tmp7 %...
2010 Nov 06
2
[LLVMdev] Hoisting elements of array argument into registers
I am seeing the wf loop get optimized just fine with llvm 2.8 (and almost as good with head). I'm running on Mac OS X 10.6. I have an apple supplied llvm-gcc and a self compiled llvm 2.8. When I run $ llvm-gcc -emit-llvm -S M.c $ opt -O2 M.s | llvm-dis I see that: 1. Tail recursion has been eliminated from wf 2. The accesses to sp have been promoted to registers 3. The loop has
2010 Oct 01
2
[LLVMdev] Illegal optimization in LLVM 2.8 during SelectionDAG? (Re: comparison pattern trouble - might be a bug in LLVM 2.8?)
...>> The original code is: > > [snip] > >> where the interesting lines are lines 12-13: >> >> x16 = (e_u8)(((data) ^ ((e_u8)crc))&1); >> if (x16 == 1) >> >> The code which goes into isel is: >> >> bb.nph: >> %0 = zext i8 %data to i32 >> %1 = zext i16 %crc to i32 >> %2 = xor i32 %1, %0 >> %3 = and i32 %2, 1 >> %4 = icmp eq i32 %3, 0 >> br i1 %4, label %bb.nph._crit_edge, label %5 >> >> inside selectiondag this becomes: >> >> Legalized sel...