search for: novrrgs

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2018 Jan 16
2
Checking when Register Allocation has been performed
...uled, so the pass should know and not the function. I'd recommend simply creating a pre-RA and a post-RA pass instead of scheduling the same pass twice. (Of course you can share most of the pass implementation if they turn out to be similar). - Matthias [1]: While currently we do not set the NoVRrgs flag pre-ra even if there are no vregs used, when loading a .mir file for example the flag is computed from scratch and will be set. > On Jan 15, 2018, at 12:26 PM, Craig Topper via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Maybe MF.getProperties().hasProperty(MachineFuncti...
2018 Jan 17
0
Checking when Register Allocation has been performed
...the pass should know and not the function. I'd recommend simply creating a pre-RA and a post-RA pass instead of scheduling the same pass twice. (Of course you can share most of the pass implementation if they turn out to be similar). - Matthias [1]: While currently we do not set the NoVRrgs flag pre-ra even if there are no vregs used, when loading a .mir file for example the flag is computed from scratch and will be set. On Jan 15, 2018, at 12:26 PM, Craig Topper via llvm-dev <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org> > wrote: Maybe MF.getProp...
2018 Jan 15
0
Checking when Register Allocation has been performed
Maybe MF.getProperties().hasProperty(MachineFunctionProperties::Property::NoVRegs))? ~Craig On Mon, Jan 15, 2018 at 12:07 PM, Martin J. O'Riordan via llvm-dev < llvm-dev at lists.llvm.org> wrote: > Hi LLVM Devs, > > > > I have some shared code that performs lowering operations that can occur > before or after register allocation. When it is pre-RA I want to only use
2018 Jan 15
3
Checking when Register Allocation has been performed
Hi LLVM Devs, I have some shared code that performs lowering operations that can occur before or after register allocation. When it is pre-RA I want to only use virtual registers for intermediate results, but post-RA I have to use only a very restricted set of physical registers. Code generation using the restricted set is not as efficient as it is when I can use virtual registers. At