search for: nouveau_vm

...f8803f9dd6c00 ffff8803f688d898 Call Trace: [<ffffffff81637988>] dump_stack+0x55/0x86 [<ffffffff81059e1d>] warn_slowpath_common+0x87/0xaf [<ffffffff81059e5a>] warn_slowpath_null+0x15/0x17 [<ffffffffa02d6109>] nouveau_mm_fini+0x4f/0x56 [nouveau] [<ffffffffa02f5703>] nouveau_vm_ref+0x154/0x180 [nouveau] [<ffffffffa02d5cdb>] ? nouveau_mm_free+0x85/0x116 [nouveau] [<ffffffffa02f57c9>] nouveau_vm_put+0x9a/0xb0 [nouveau] [<ffffffffa033462d>] ? nouveau_gem_info+0x9d/0x9d [nouveau] [<ffffffffa0334646>] nouveau_gem_object_delete+0x19/0x28 [nouveau] [...

...ct > (and thus I'm on the right track) : This patch (which needs cleanups, and probably be broken down for bisectability) makes it work for me. I've disabled nouveau_dri for now as this has its own problems related to Ajax recent gallium endian changes. Note the horrible duplication of nouveau_vm_map_sg... I think to fix it "cleanly" we probably need to slightly change the ->map_sg API to the vmmr. However, I do have a question whose answer might make things a LOT easier if "yes" can make things a lot easier: Can we guarantee that that such an sg object (I assume th...

...iff --git a/drivers/gpu/drm/nouveau/core/subdev/vm/base.c b/drivers/gpu/drm/nouveau/core/subdev/vm/base.c > > index ef3133e..5833851 100644 > > --- a/drivers/gpu/drm/nouveau/core/subdev/vm/base.c > > +++ b/drivers/gpu/drm/nouveau/core/subdev/vm/base.c > > @@ -84,10 +84,11 @@ nouveau_vm_map_sg_table(struct nouveau_vma *vma, u64 delta, u64 length, > > { > > struct nouveau_vm *vm = vma->vm; > > struct nouveau_vmmgr *vmm = vm->vmm; > > - int big = vma->node->type != vmm->spg_shift; > > + u32 shift = vma->node->type; > > +...

...nged, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/nouveau/core/subdev/vm/base.c b/drivers/gpu/drm/nouveau/core/subdev/vm/base.c index 77c67fc..e66fb77 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/vm/base.c +++ b/drivers/gpu/drm/nouveau/core/subdev/vm/base.c @@ -362,7 +362,7 @@ nouveau_vm_create(struct nouveau_vmmgr *vmm, u64 offset, u64 length, vm->fpde = offset >> (vmm->pgt_bits + 12); vm->lpde = (offset + length - 1) >> (vmm->pgt_bits + 12); - vm->pgt = kcalloc(vm->lpde - vm->fpde + 1, sizeof(*vm->pgt), GFP_KERNEL); + vm->pgt = vzall...

...the right track) : > This patch (which needs cleanups, and probably be broken down for > bisectability) makes it work for me. I've disabled nouveau_dri for now > as this has its own problems related to Ajax recent gallium endian > changes. > > Note the horrible duplication of nouveau_vm_map_sg... > > I think to fix it "cleanly" we probably need to slightly change the > ->map_sg API to the vmmr. However, I do have a question whose answer > might make things a LOT easier if "yes" can make things a lot easier: > > Can we guarantee that that su...

...;offset; } diff --git a/drivers/gpu/drm/nouveau/core/include/core/gpuobj.h b/drivers/gpu/drm/nouveau/core/include/core/gpuobj.h index d09adf1..f65bf5b 100644 --- a/drivers/gpu/drm/nouveau/core/include/core/gpuobj.h +++ b/drivers/gpu/drm/nouveau/core/include/core/gpuobj.h @@ -16,7 +16,10 @@ struct nouveau_vm; struct nouveau_gpuobj { struct nouveau_object base; struct nouveau_object *parent; + + struct nouveau_mm *node_heap; struct nouveau_mm_node *node; + struct nouveau_mm heap; u32 flags; -- 1.7.12

...s(+), 1 deletion(-) diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c index 2fa736d..cee7448 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo.c +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c @@ -1551,9 +1551,25 @@ nouveau_bo_vma_del(struct nouveau_bo *nvbo, struct nouveau_vma *vma) { if (vma->node) { if (nvbo->bo.mem.mem_type != TTM_PL_SYSTEM) { + ttm_bo_reserve(&nvbo->bo, false, false, false, 0); spin_lock(&nvbo->bo.bdev->fence_lock); ttm_bo_wait(&nvbo->bo, false, false, false); spin_unlock(&nvbo->bo.bdev->fe...

...; diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c > index 89b992e..355a1b7 100644 > --- a/drivers/gpu/drm/nouveau/nouveau_bo.c > +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c > @@ -1560,7 +1560,8 @@ nouveau_bo_vma_add(struct nouveau_bo *nvbo, struct nouveau_vm *vm, > > if (nvbo->bo.mem.mem_type == TTM_PL_VRAM) > nouveau_vm_map(vma, nvbo->bo.mem.mm_node); > - else if (nvbo->bo.mem.mem_type == TTM_PL_TT) { > + else if (nvbo->bo.mem.mem_type == TTM_PL_TT && > + nvbo->page_shift == vma->vm->vmm->spg_...

...ers/gpu/drm/nouveau/core/subdev/vm/base.c b/drivers/gpu/drm/nouveau/core/subdev/vm/base.c >> > index ef3133e..5833851 100644 >> > --- a/drivers/gpu/drm/nouveau/core/subdev/vm/base.c >> > +++ b/drivers/gpu/drm/nouveau/core/subdev/vm/base.c >> > @@ -84,10 +84,11 @@ nouveau_vm_map_sg_table(struct nouveau_vma *vma, u64 delta, u64 length, >> > { >> > struct nouveau_vm *vm = vma->vm; >> > struct nouveau_vmmgr *vmm = vm->vmm; >> > - int big = vma->node->type != vmm->spg_shift; >> > + u32 shift = vma-&gt...

...gpu/drm/nouveau/nouveau_fence.c | 2 +- drivers/gpu/drm/nouveau/nouveau_gem.c | 2 +- drivers/gpu/drm/nouveau/nouveau_mem.c | 5 +++-- drivers/gpu/drm/nouveau/nouveau_mm.c | 8 +++++++- drivers/gpu/drm/nouveau/nouveau_mm.h | 12 ++++++------ drivers/gpu/drm/nouveau/nouveau_vm.c | 3 ++- drivers/gpu/drm/nouveau/nv04_crtc.c | 2 +- drivers/gpu/drm/nouveau/nv50_crtc.c | 4 ++-- drivers/gpu/drm/nouveau/nv50_evo.c | 4 ++-- drivers/gpu/drm/nouveau/nv50_instmem.c | 2 +- drivers/gpu/drm/nouveau/nv50_vram.c | 17 +++++++++++++--...

...tions, it would be awesome if you could >> answer them so I can have a shot at fixing it all :-) > Ok, a few more questions :-) > > - in struct nouveau_mm_node, what unit are "offset" and "length" ? Depends on the context. It's re-used a few times. In case of nouveau_vm it's multiples of 1<<12, which is the smallest unit a card can address. > They *seem* to be hard wired to be in units of 4k (regardless of either > of system page size) which I assume means card small page size, but > "offset" is in bytes ? At least according to my pars...

...int32_t flags = TTM_PL_MASK_CACHING | > + uint32_t flags = nvbo->valid_caching | > (nvbo->pin_refcnt ? TTM_PL_FLAG_NO_EVICT : 0); > > pl->placement = nvbo->placements; > @@ -1554,6 +1560,9 @@ nouveau_bo_vma_add(struct nouveau_bo *nvbo, struct nouveau_vm *vm, > if (nvbo->bo.mem.mem_type == TTM_PL_VRAM) > nouveau_vm_map(vma, nvbo->bo.mem.mm_node); > else if (nvbo->bo.mem.mem_type == TTM_PL_TT) { > + if (!(nvbo->valid_caching & TTM_PL_FLAG_CACHED)) > +...

...heck I didn't break x86 :-) diff --git a/drivers/gpu/drm/nouveau/core/subdev/vm/base.c b/drivers/gpu/drm/nouveau/core/subdev/vm/base.c index ef3133e..44dc050 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/vm/base.c +++ b/drivers/gpu/drm/nouveau/core/subdev/vm/base.c @@ -82,55 +82,77 @@ void nouveau_vm_map_sg_table(struct nouveau_vma *vma, u64 delta, u64 length, struct nouveau_mem *mem) { + /* + * XXX Should the "12" in a couple of places here be replaced + * with vmm->spg_shift for correctness ? Might help if we ever + * support 64k card pages on 64k PAGE_SIZE systems + */...

...om> --- diff --git a/drivers/gpu/drm/nouveau/core/include/subdev/vm.h b/drivers/gpu/drm/nouveau/core/include/subdev/vm.h index c9509039f94b..945ca4efe97c 100644 --- a/drivers/gpu/drm/nouveau/core/include/subdev/vm.h +++ b/drivers/gpu/drm/nouveau/core/include/subdev/vm.h @@ -50,6 +50,12 @@ struct nouveau_vma { struct nouveau_mm_node *node; u64 offset; u32 access; + enum nouveau_vma_mapping { + NOUVEAU_MAP_UNMAPPED, + NOUVEAU_MAP_SG, + NOUVEAU_MAP_GART, + NOUVEAU_MAP_VRAM + } mapping; }; struct nouveau_vm { diff --git a/drivers/gpu/drm/nouveau/core/subdev/vm/base.c b/drivers/gpu/drm...

...t;> straightforward way to avoid a null deref that you see happens in the >> bug. I haven't figured out the root cause of this, but it's getting >> well into the "I have no idea how TTM works" space. However this seems >> like a bit of defensive programming -- nouveau_vm_map_sg will pass >> node->pages as a list down, which will be dereferenced by >> nvc0_vm_map_sg. Perhaps the other arguments should make that >> dereferencing not happen, but it definitely was happening here, as you >> can see in the bug. >> >> Ben/Maarten, I&...

...t; > diff --git a/drivers/gpu/drm/nouveau/core/subdev/vm/base.c b/drivers/gpu/drm/nouveau/core/subdev/vm/base.c > index ef3133e..44dc050 100644 > --- a/drivers/gpu/drm/nouveau/core/subdev/vm/base.c > +++ b/drivers/gpu/drm/nouveau/core/subdev/vm/base.c > @@ -82,55 +82,77 @@ void > nouveau_vm_map_sg_table(struct nouveau_vma *vma, u64 delta, u64 length, > struct nouveau_mem *mem) > { > + /* > + * XXX Should the "12" in a couple of places here be replaced > + * with vmm->spg_shift for correctness ? Might help if we e...

...v41.c b/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c index 4545b0c..e41ce9b 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c +++ b/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c @@ -67,7 +67,7 @@ nv41_vm_unmap(struct nouveau_gpuobj *pgt, u32 pte, u32 cnt) static int nv41_vm_flush(struct nouveau_vm *vm) { - struct nv04_vm_priv *priv = (void *)vm->vmm; + struct nv04_vmmgr_priv *priv = (void *)vm->vmm; int ret = 0; mutex_lock(&nv_subdev(priv)->mutex); -- 1.7.12

...41.c b/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c index 49050d9..9474cfc 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c +++ b/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c @@ -67,7 +67,7 @@ nv41_vm_unmap(struct nouveau_gpuobj *pgt, u32 pte, u32 cnt) static void nv41_vm_flush(struct nouveau_vm *vm) { - struct nv04_vm_priv *priv = (void *)vm->vmm; + struct nv04_vmmgr_priv *priv = (void *)vm->vmm; mutex_lock(&nv_subdev(priv)->mutex); nv_wr32(priv, 0x100810, 0x00000022); -- 1.7.12

...tions(-) > > diff --git a/drivers/gpu/drm/nouveau/core/subdev/vm/base.c b/drivers/gpu/drm/nouveau/core/subdev/vm/base.c > index 77c67fc..e66fb77 100644 > --- a/drivers/gpu/drm/nouveau/core/subdev/vm/base.c > +++ b/drivers/gpu/drm/nouveau/core/subdev/vm/base.c > @@ -362,7 +362,7 @@ nouveau_vm_create(struct nouveau_vmmgr *vmm, u64 offset, u64 length, > vm->fpde = offset >> (vmm->pgt_bits + 12); > vm->lpde = (offset + length - 1) >> (vmm->pgt_bits + 12); > > - vm->pgt = kcalloc(vm->lpde - vm->fpde + 1, sizeof(*vm->pgt), GFP_KERNEL); &...

...ttm_placement *pl = &nvbo->placement; - uint32_t flags = TTM_PL_MASK_CACHING | + uint32_t flags = nvbo->valid_caching | (nvbo->pin_refcnt ? TTM_PL_FLAG_NO_EVICT : 0); pl->placement = nvbo->placements; @@ -1554,6 +1560,9 @@ nouveau_bo_vma_add(struct nouveau_bo *nvbo, struct nouveau_vm *vm, if (nvbo->bo.mem.mem_type == TTM_PL_VRAM) nouveau_vm_map(vma, nvbo->bo.mem.mm_node); else if (nvbo->bo.mem.mem_type == TTM_PL_TT) { + if (!(nvbo->valid_caching & TTM_PL_FLAG_CACHED)) + vma->access |= NV_MEM_ACCESS_NOSNOOP; + if (node->sg) nouveau_vm_map_s...