Displaying 4 results from an estimated 4 matches for "nouveau_ram_data".
2014 Sep 04
1
[PATCH 4/8] fb/ramnve0: Disable FB before reclocking
...ubdev/fb/ramnve0.c b/drivers/gpu/drm/nouveau/core/subdev/fb/ramnve0.c
> index c5b46e3..9764792 100644
> --- a/drivers/gpu/drm/nouveau/core/subdev/fb/ramnve0.c
> +++ b/drivers/gpu/drm/nouveau/core/subdev/fb/ramnve0.c
> @@ -998,6 +998,8 @@ nve0_ram_calc_xits(struct nouveau_fb *pfb, struct nouveau_ram_data *next)
> if (ret)
> return ret;
>
> + ram_fb_disable(fuc);
> +
> ram->mode = (next->freq > fuc->refpll.vco1.max_freq) ? 2 : 1;
> ram->from = ram_rd32(fuc, 0x1373f4) & 0x0000000f;
>
> @@ -1061,6 +1063,9 @@ nv...
2014 Sep 04
0
[PATCH 4/8] fb/ramnve0: Disable FB before reclocking
...u/drm/nouveau/core/subdev/fb/ramnve0.c b/drivers/gpu/drm/nouveau/core/subdev/fb/ramnve0.c
index c5b46e3..9764792 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/fb/ramnve0.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/fb/ramnve0.c
@@ -998,6 +998,8 @@ nve0_ram_calc_xits(struct nouveau_fb *pfb, struct nouveau_ram_data *next)
if (ret)
return ret;
+ ram_fb_disable(fuc);
+
ram->mode = (next->freq > fuc->refpll.vco1.max_freq) ? 2 : 1;
ram->from = ram_rd32(fuc, 0x1373f4) & 0x0000000f;
@@ -1061,6 +1063,9 @@ nve0_ram_calc_xits(struct nouveau_fb *pfb, struct nouveau_ram_data *next)
bre...
2014 Sep 04
10
MEMX improvements + DDR 2/3 MR generation
Patch 1 and 2 implement wait-for-vblank, required to remove flicker when reclocking memory
Patch 3 and 4 allow me to do things between waiting for VBLANK and disabling FB, like pause PFIFO and wait for the engines to idle. This minimises the time PFIFO is paused, thus maximises performance.
The rest of the patches speak for themselves. As the actual memory reclocking script is still somewhat prone
2014 Sep 29
18
Implement reclocking for DDR2, DDR3, GDDR3
Following a series of patches that implement memory reclocking for NVA3/5/8 with
DDR2, DDR3 and GDDR3 on board. I tested these patches on 6 different graphics
cards, but I expect reclocking now to work on many more.
Testers can pick up these patches and test it by enabling pstate
(nouveau.pstate=1). They should then be able to change clocks by writing to
/sys/class/drm/card0/device/pstate. Correct