search for: nouveau_platform_device

...6 @@ nouveau_drm_device_remove(struct drm_device *dev) nouveau_object_ref(NULL, &device); nouveau_object_debug(); } -EXPORT_SYMBOL(nouveau_drm_device_remove); static void nouveau_drm_remove(struct pci_dev *pdev) @@ -1083,7 +1083,6 @@ err_free: return ERR_PTR(err); } -EXPORT_SYMBOL(nouveau_platform_device_create_); static int __init nouveau_drm_init(void) @@ -1105,6 +1104,10 @@ nouveau_drm_init(void) if (!nouveau_modeset) return 0; +#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER + platform_driver_register(&nouveau_platform_driver); +#endif + nouveau_register_dsm_handler(); return drm_pci_i...

...to let us compute the address of one from the other. Since the platform device resources (clocks, regulators, ...) need to live longer than the nouveau_device, they are stored into their own structure which is allocated separately. Changes since v2: * Allocate the nouveau_device flattened into the nouveau_platform_device to be able to compute one from another easily, without having to ressort on the drvdata which is required to store the drm_device. * Only propose the platform driver if a supported arch (Tegra for now) is enabled. * Move structure definitions into their own header file as some subdevs (e.g....

...ma *vma, struct nvkm_gpuobj *pgt, > + struct nvkm_mem *mem, u32 pte, dma_addr_t *list, > + void **priv) > +{ > + struct nvkm_vm *vm = vma->vm; > + struct nvkm_mmu *mmu = vm->mmu; > + struct nvkm_mm_node *node; > + struct nouveau_platform_device *plat; > + struct gk20a_mmu_iommu_mapping *p; > + int npages = 1 << (mmu->lpg_shift - mmu->spg_shift); > + int i, ret; > + u64 addr; > + > + plat = nv_device_to_platform(nv_device(&mmu->base)); > + > + *priv = kzalloc(si...

...u_object_ref(NULL, &device); > nouveau_object_debug(); > } > -EXPORT_SYMBOL(nouveau_drm_device_remove); > > static void > nouveau_drm_remove(struct pci_dev *pdev) > @@ -1083,7 +1083,6 @@ err_free: > > return ERR_PTR(err); > } > -EXPORT_SYMBOL(nouveau_platform_device_create_); > > static int __init > nouveau_drm_init(void) > @@ -1105,6 +1104,10 @@ nouveau_drm_init(void) > if (!nouveau_modeset) > return 0; > > +#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER > + platform_driver_register(&nouveau_platform_drive...

...data(pdev); + + nouveau_drm_device_remove(dev); +} static int nouveau_do_suspend(struct drm_device *dev, bool runtime) @@ -1003,24 +1011,41 @@ nouveau_drm_pci_driver = { .driver.pm = &nouveau_pm_ops, }; -int nouveau_drm_platform_probe(struct platform_device *pdev) +struct drm_device * +nouveau_platform_device_create_(struct platform_device *pdev, int size, + void **pobject) { - struct nouveau_device *device; - int ret; + struct drm_device *drm; + int err; - ret = nouveau_device_create(pdev, NOUVEAU_BUS_PLATFORM, + err = nouveau_device_create_(pdev, NOUVEAU_BUS_PLATFORM, nouveau_platform_n...

...> static int > nouveau_do_suspend(struct drm_device *dev, bool runtime) > @@ -1003,24 +1011,41 @@ nouveau_drm_pci_driver = { > .driver.pm = &nouveau_pm_ops, > }; > > -int nouveau_drm_platform_probe(struct platform_device *pdev) > +struct drm_device * > +nouveau_platform_device_create_(struct platform_device *pdev, int size, > + void **pobject) > { > - struct nouveau_device *device; > - int ret; > + struct drm_device *drm; > + int err; > > - ret = nouveau_device_create(pdev, NOUVEAU_BUS_PLATFORM, > + err = nouveau_device_create_(pdev, NO...

Hi, Generally the the imported buffers which has memory type TTM_PL_TT are mapped as small pages probably due to lack of big page allocation. But the platform device which also use memory type TTM_PL_TT, like GK20A, can *allocate* big page though the IOMMU hardware inside the SoC. This is a try to map the imported buffers as big pages in GMMU by the platform IOMMU. With some preparation work to

....969dbddd786d 100644 > --- a/drm/nouveau_platform.h > +++ b/drm/nouveau_platform.h > @@ -35,6 +35,9 @@ struct nouveau_platform_gpu { > struct clk *clk_pwr; > > struct regulator *vdd; > + > + struct tegra_mc *mc; > + unsigned int swgroup; > }; > > struct nouveau_platform_device {

...dress of one from the other. Since the platform device resources (clocks, > regulators, ...) need to live longer than the nouveau_device, they are stored > into their own structure which is allocated separately. > > Changes since v2: > * Allocate the nouveau_device flattened into the nouveau_platform_device to > be able to compute one from another easily, without having to ressort on the > drvdata which is required to store the drm_device. > * Only propose the platform driver if a supported arch (Tegra for now) is > enabled. > * Move structure definitions into their own header fil...

...veau_platform.h b/drm/nouveau_platform.h index 58c28b5653d5..969dbddd786d 100644 --- a/drm/nouveau_platform.h +++ b/drm/nouveau_platform.h @@ -35,6 +35,9 @@ struct nouveau_platform_gpu { struct clk *clk_pwr; struct regulator *vdd; + + struct tegra_mc *mc; + unsigned int swgroup; }; struct nouveau_platform_device { -- 1.9.1

...rm.h >> +++ b/drm/nouveau_platform.h >> @@ -35,6 +35,9 @@ struct nouveau_platform_gpu { >> struct clk *clk_pwr; >> >> struct regulator *vdd; >> + >> + struct tegra_mc *mc; >> + unsigned int swgroup; >> }; >> >> struct nouveau_platform_device { >

Some Tegra drivers might be compiled as kernel modules, and they need the fuse information for initialization. One example is the GK20A Nouveau driver. It needs the GPU speedo value to calculate frequency-voltage table. So export the tegra_sku_info. Signed-off-by: Vince Hsu <vinceh at nvidia.com> Acked-by: Alexandre Courbot <acourbot at nvidia.com> Acked-by: Thierry Reding <treding

...t = 0; + } + + return ret; +} + +static int +gk20a_volt_ctor(struct nouveau_object *parent, struct nouveau_object *engine, + struct nouveau_oclass *oclass, void *data, u32 size, + struct nouveau_object **pobject) +{ + struct gk20a_volt_priv *priv; + struct nouveau_volt *volt; + struct nouveau_platform_device *plat; + int i, ret, uv; + + ret = nouveau_volt_create(parent, engine, oclass, &priv); + *pobject = nv_object(priv); + if (ret) + return ret; + + volt = &priv->base; + + plat = nv_device_to_platform(nv_device(parent)); + + uv = regulator_get_voltage(plat->gpu->vdd); + nv_info(priv...

...t = 0; + } + + return ret; +} + +static int +gk20a_volt_ctor(struct nouveau_object *parent, struct nouveau_object *engine, + struct nouveau_oclass *oclass, void *data, u32 size, + struct nouveau_object **pobject) +{ + struct gk20a_volt_priv *priv; + struct nouveau_volt *volt; + struct nouveau_platform_device *plat; + int i, ret, uv; + + ret = nouveau_volt_create(parent, engine, oclass, &priv); + *pobject = nv_object(priv); + if (ret) + return ret; + + volt = &priv->base; + + plat = nv_device_to_platform(nv_device(parent)); + + uv = regulator_get_voltage(plat->gpu->vdd); + nv_info(priv...

...atic int > +gk20a_volt_ctor(struct nouveau_object *parent, struct nouveau_object *engine, > + struct nouveau_oclass *oclass, void *data, u32 size, > + struct nouveau_object **pobject) > +{ > + struct gk20a_volt_priv *priv; > + struct nouveau_volt *volt; > + struct nouveau_platform_device *plat; > + int i, ret, uv; > + > + ret = nouveau_volt_create(parent, engine, oclass, &priv); > + *pobject = nv_object(priv); > + if (ret) > + return ret; > + > + volt = &priv->base; > + > + plat = nv_device_to_platform(nv_device(parent)); > + > + uv =...

Some Tegra drivers might be complied as kernel modules, and they need the fuse information for initialization. One example is the GK20A Nouveau driver. It needs the GPU speedo value to calculate frequency-voltage table. So export the tegra_sku_info. Signed-off-by: Vince Hsu <vinceh at nvidia.com> --- v2: add more description why we need this patch drivers/soc/tegra/fuse/fuse-tegra.c | 1

....rl_entry, &node->mem->regions); node->base.addr = node->mem->offset; node->base.size = size; @@ -202,6 +400,7 @@ gk20a_instmem_ctor(struct nvkm_object *parent, struct nvkm_object *engine, struct nvkm_object **pobject) { struct gk20a_instmem_priv *priv; + struct nouveau_platform_device *plat; int ret; ret = nvkm_instmem_create(parent, engine, oclass, &priv); @@ -211,6 +410,18 @@ gk20a_instmem_ctor(struct nvkm_object *parent, struct nvkm_object *engine, spin_lock_init(&priv->lock); + plat = nv_device_to_platform(nv_device(parent)); + if (plat->gpu->iom...

...ect *parent, struct nouveau_object >> *engine, >> + struct nouveau_oclass *oclass, void *data, u32 size, >> + struct nouveau_object **pobject) >> +{ >> + struct gk20a_volt_priv *priv; >> + struct nouveau_volt *volt; >> + struct nouveau_platform_device *plat; >> + int i, ret, uv; >> + >> + ret = nouveau_volt_create(parent, engine, oclass, &priv); >> + *pobject = nv_object(priv); >> + if (ret) >> + return ret; >> + >> + volt = &priv->base; >> + >> + pla...

Changes since v3: - Use a single dma_attr for all DMA-API allocations in instmem instead of one per allocation - Use device.info.ram_size instead of pfb->ram to check whether VRAM is present outside of nvkm Changes since v2: - Cleaner changes for ltc - Fixed typos in gk20a instmem IOMMU comments Changes since v1: - Add missing else condition in ltc - Remove extra flags that slipped into

Signed-off-by: Vince Hsu <vinceh at nvidia.com> --- nvkm/subdev/volt/base.c | 67 ++++++++++++++++++++++++++++--------------------- 1 file changed, 38 insertions(+), 29 deletions(-) diff --git a/nvkm/subdev/volt/base.c b/nvkm/subdev/volt/base.c index 32794a999106..26ccd8df193f 100644 --- a/nvkm/subdev/volt/base.c +++ b/nvkm/subdev/volt/base.c @@ -101,6 +101,41 @@ nouveau_volt_set_id(struct