search for: nouveau_gem_tile_zeta

...&drm->ttm.bdev; if (!nv_device_is_cpu_coherent(nvkm_device(&drm->device))) @@ -272,7 +272,7 @@ set_placement_range(struct nouveau_bo *nvbo, uint32_t type) * speed up when alpha-blending and depth-test are enabled * at the same time. */ - if (nvbo->tile_flags & NOUVEAU_GEM_TILE_ZETA) { + if (nvbo->bo_flags & NOUVEAU_GEM_TILE_ZETA) { fpfn = vram_pages / 2; lpfn = ~0; } else { @@ -1291,7 +1291,7 @@ nouveau_bo_vm_bind(struct ttm_buffer_object *bo, struct ttm_mem_reg *new_mem, if (drm->device.info.family >= NV_DEVICE_INFO_V0_CELSIUS) { *new_tile = nv1...

...kmap; > diff --git a/include/uapi/drm/nouveau_drm.h b/include/uapi/drm/nouveau_drm.h > index 2a5769f..4948eee2 100644 > --- a/include/uapi/drm/nouveau_drm.h > +++ b/include/uapi/drm/nouveau_drm.h > @@ -36,6 +36,7 @@ > #define NOUVEAU_GEM_TILE_32BPP 0x00000002 > #define NOUVEAU_GEM_TILE_ZETA 0x00000004 > #define NOUVEAU_GEM_TILE_NONCONTIG 0x00000008 > +#define NOUVEAU_GEM_TILE_WCUS 0x00000010 /* write-combined, unsnooped */ > > struct drm_nouveau_gem_info { > uint32_t handle; > -- > 1.8.3.1 >

...ements[3]; struct ttm_bo_kmap_obj kmap; diff --git a/include/uapi/drm/nouveau_drm.h b/include/uapi/drm/nouveau_drm.h index 2a5769f..4948eee2 100644 --- a/include/uapi/drm/nouveau_drm.h +++ b/include/uapi/drm/nouveau_drm.h @@ -36,6 +36,7 @@ #define NOUVEAU_GEM_TILE_32BPP 0x00000002 #define NOUVEAU_GEM_TILE_ZETA 0x00000004 #define NOUVEAU_GEM_TILE_NONCONTIG 0x00000008 +#define NOUVEAU_GEM_TILE_WCUS 0x00000010 /* write-combined, unsnooped */ struct drm_nouveau_gem_info { uint32_t handle; -- 1.8.3.1

This is the first set of patches to make Nouveau work on Tegra. Those are only the obvious correctness fixes, a lot of optimization work remains to be done, but at least it's enough to get accel working and let the machine survive a piglit run. A new BO flag is introduced to allow userspace to hint the kernel about possible optimizations. Lucas Stach (6): drm/ttm: recognize ARM arch in

Hi guys, I'd like to start a new thread about explicit fence synchronization. This time with a Nouveau twist. :-) First, let me define what I understand by implicit/explicit sync: Implicit synchronization * Fences are attached to buffers * Kernel manages fences automatically based on buffer read/write access Explicit synchronization * Fences are passed around independently * Kernel takes