search for: nouveau_dp_sst

...= nouveau_encoder(encoder); - if (nv_encoder->dcb->type == DCB_OUTPUT_DP) { - int ret = nouveau_dp_detect(nv_encoder); + switch (nv_encoder->dcb->type) { + case DCB_OUTPUT_DP: + ret = nouveau_dp_detect(nv_encoder); if (ret == NOUVEAU_DP_MST) return NULL; - if (ret == NOUVEAU_DP_SST) - break; - } else - if ((vga_switcheroo_handler_flags() & - VGA_SWITCHEROO_CAN_SWITCH_DDC) && - nv_encoder->dcb->type == DCB_OUTPUT_LVDS && - nv_encoder->i2c) { - int ret; - vga_switcheroo_lock_ddc(dev->pdev); - ret = nvkm_probe_i2c(nv_enc...

...= nouveau_encoder(encoder); - if (nv_encoder->dcb->type == DCB_OUTPUT_DP) { - int ret = nouveau_dp_detect(nv_encoder); + switch (nv_encoder->dcb->type) { + case DCB_OUTPUT_DP: + ret = nouveau_dp_detect(nv_encoder); if (ret == NOUVEAU_DP_MST) return NULL; - if (ret == NOUVEAU_DP_SST) - break; - } else - if ((vga_switcheroo_handler_flags() & - VGA_SWITCHEROO_CAN_SWITCH_DDC) && - nv_encoder->dcb->type == DCB_OUTPUT_LVDS && - nv_encoder->i2c) { - int ret; + else if (ret == NOUVEAU_DP_SST) + found = nv_encoder; + + break;...

...(nv_encoder->dcb->type == DCB_OUTPUT_DP) { > - int ret = nouveau_dp_detect(nv_encoder); > + switch (nv_encoder->dcb->type) { > + case DCB_OUTPUT_DP: > + ret = nouveau_dp_detect(nv_encoder); > if (ret == NOUVEAU_DP_MST) > return NULL; > - if (ret == NOUVEAU_DP_SST) > - break; > - } else > - if ((vga_switcheroo_handler_flags() & > - VGA_SWITCHEROO_CAN_SWITCH_DDC) && > - nv_encoder->dcb->type == DCB_OUTPUT_LVDS && > - nv_encoder->i2c) { > - int ret; > - vga_switcheroo_lock_ddc(dev-&g...

...pe == DCB_OUTPUT_DP) { 8777c5c11 Ben Skeggs 2014-06-06 435 int ret = nouveau_dp_detect(nv_encoder); 52aa30f25 Ben Skeggs 2016-11-04 436 if (ret == NOUVEAU_DP_MST) 52aa30f25 Ben Skeggs 2016-11-04 437 return NULL; 52aa30f25 Ben Skeggs 2016-11-04 438 if (ret == NOUVEAU_DP_SST) 8777c5c11 Ben Skeggs 2014-06-06 439 break; 8777c5c11 Ben Skeggs 2014-06-06 440 } else 39c1c9011 Lukas Wunner 2016-01-11 441 if ((vga_switcheroo_handler_flags() & 39c1c9011 Lukas Wunner 2016-01-11 442 VGA_SWITCHEROO_CAN_SWITCH_DDC) && 39c1c9011 Luk...

...{ > 8777c5c11 Ben Skeggs 2014-06-06 435 int ret = nouveau_dp_detect(nv_encoder); > 52aa30f25 Ben Skeggs 2016-11-04 436 if (ret == NOUVEAU_DP_MST) > 52aa30f25 Ben Skeggs 2016-11-04 437 return NULL; > 52aa30f25 Ben Skeggs 2016-11-04 438 if (ret == NOUVEAU_DP_SST) > 8777c5c11 Ben Skeggs 2014-06-06 439 break; > 8777c5c11 Ben Skeggs 2014-06-06 440 } else > 39c1c9011 Lukas Wunner 2016-01-11 441 if ((vga_switcheroo_handler_flags() & > 39c1c9011 Lukas Wunner 2016-01-11 442 VGA_SWITCHEROO_CAN_SWITCH_DDC) &amp...

...; diff --git a/drivers/gpu/drm/nouveau/nouveau_dp.c b/drivers/gpu/drm/nouveau/nouveau_dp.c index 2674f1587457..5cba2a23781d 100644 --- a/drivers/gpu/drm/nouveau/nouveau_dp.c +++ b/drivers/gpu/drm/nouveau/nouveau_dp.c @@ -98,3 +98,30 @@ nouveau_dp_detect(struct nouveau_encoder *nv_encoder) return NOUVEAU_DP_SST; return ret; } + +/* TODO: + * Use the minimum possible BPC here, once we add support for the max bpc + * property. + */ +enum drm_mode_status +nv50_dp_mode_valid(struct drm_connector *connector, + struct nouveau_encoder *outp, + const struct drm_display_mode *mode, + unsigned *out_c...

Most of the reason I'm asking for an RFC here is because this code pulls a lot of code out of i915 and into shared DP helpers. Anyway-nouveau's HPD related code has been collecting dust for a while. Other then the occasional runtime PM related and MST related fixes, we're missing a lot of nice things that have been added to DRM since this was originally written. Additionally, the code

To start off: this patch series is less work to review then it looks - most (but not all) of the nouveau related work has already been reviewed elsewhere. Most of the reason I'm asking for an RFC here is because this code pulls a lot of code out of i915 and into shared DP helpers. Anyway-nouveau's HPD related code has been collecting dust for a while. Other then the occasional runtime PM

Most of the reason I'm asking for an RFC here is because this code pulls a lot of code out of i915 and into shared DP helpers. Anyway-nouveau's HPD related code has been collecting dust for a while. Other then the occasional runtime PM related and MST related fixes, we're missing a lot of nice things that have been added to DRM since this was originally written. Additionally, the code

From: Ville Syrjälä <ville.syrjala at linux.intel.com> Changes from the previous version mainly involve Danoie's suggestion of hiding the drm_encoder_find() in the iterator macro. I also polished the msm and tilcdc cases a bit more with another small helper. Cc: Alex Deucher <alexander.deucher at amd.com> Cc: amd-gfx at lists.freedesktop.org Cc: Ben Skeggs <bskeggs at

To start off: this patch series is less work to review then it looks - most (but not all) of the nouveau related work has already been reviewed elsewhere. Most of the reason I'm asking for an RFC here is because this code pulls a lot of code out of i915 and into shared DP helpers. Anyway-nouveau's HPD related code has been collecting dust for a while. Other then the occasional runtime PM

Currently, nouveau doesn't actually bother to try probing whether or not it can actually handle interlaced modes over DisplayPort. As a result, on volta and later we'll end up trying to set an interlaced mode even when it's not supported and cause the front end for the display engine to hang. So, let's teach nouveau to reject interlaced modes on hardware that can't actually

Currently, nouveau doesn't actually bother to try probing whether or not it can actually handle interlaced modes over DisplayPort. As a result, on volta and later we'll end up trying to set an interlaced mode even when it's not supported and cause the front end for the display engine to hang. So, let's teach nouveau to reject interlaced modes on hardware that can't actually

Currently, nouveau doesn't actually bother to try probing whether or not it can actually handle interlaced modes over DisplayPort. As a result, on volta and later we'll end up trying to set an interlaced mode even when it's not supported and cause the front end for the display engine to hang. So, let's teach nouveau to reject interlaced modes on hardware that can't actually