search for: nouveau_copi

Displaying 9 results from an estimated 9 matches for "nouveau_copi".

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2016 Oct 27
1
[PATCH v2 6/7] copy: add maxwell/pascal copy engine classes
0xc0b5 is not in rnndb, I guess it should be GP100_COPY, right? Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com> On 10/27/2016 04:02 PM, Ilia Mirkin wrote: > Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> > --- > src/nouveau_copy.c | 2 ++ > src/nvc0_accel.c | 10 +++++++++- > 2 files changed, 11 insertions(+), 1 deletion(-) > > diff --git
2016 Oct 27
0
[PATCH v2 6/7] copy: add maxwell/pascal copy engine classes
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- src/nouveau_copy.c | 2 ++ src/nvc0_accel.c | 10 +++++++++- 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/src/nouveau_copy.c b/src/nouveau_copy.c index c139de6..7118a7a 100644 --- a/src/nouveau_copy.c +++ b/src/nouveau_copy.c @@ -42,6 +42,8 @@ nouveau_copy_init(ScreenPtr pScreen) int engine; Bool
2017 Mar 22
0
[PATCH xf86-video-nouveau] Add Pascal family support, identical to Maxwell
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- Untested. src/nouveau_copy.c | 2 ++ src/nouveau_exa.c | 1 + src/nv_accel_common.c | 1 + src/nv_driver.c | 3 +++ src/nv_type.h | 1 + src/nvc0_accel.c | 6 ++++++ 6 files changed, 14 insertions(+) diff --git a/src/nouveau_copy.c b/src/nouveau_copy.c index 7118a7a..7fbcc87 100644 --- a/src/nouveau_copy.c
2014 Sep 04
0
[PATCH] copy: don't bother trying to create copy on pre-nva3
Only the NVA3/5/8/F tesla chips have a copy engine. Don't bother trying to create one on earlier tesla chips (and thus printing an error on failure). Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- src/nouveau_copy.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/nouveau_copy.c b/src/nouveau_copy.c index f46f0c3..3202121 100644 --- a/src/nouveau_copy.c +++
2017 Mar 22
0
[PATCH xf86-video-nouveau v2] Add Pascal family support, identical to Maxwell
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- v1 -> v2: add 0x130 as a valid chip type early on in detection src/nouveau_copy.c | 2 ++ src/nouveau_exa.c | 1 + src/nv_accel_common.c | 1 + src/nv_driver.c | 4 ++++ src/nv_type.h | 1 + src/nvc0_accel.c | 6 ++++++ 6 files changed, 15 insertions(+) diff --git a/src/nouveau_copy.c
2016 Oct 16
2
[PATCH] exa: add GM10x acceleration support
rendercheck -f a8r8g8b8 passes as much as on a GK208, and xv appears to work. Very lightly tested. Instead of sticking coordinates into pushbufs, the vertex shader is modified to read them from a constbuf, indexed by vertex id. This approach could be used for all nvc0 generations, but I didn't want to rock the boat. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- Note: this
2016 Oct 27
0
[PATCH v2 1/7] exa: add GM10x acceleration support
rendercheck -f a8r8g8b8 passes as much as on a GK208, and xv appears to work. Very lightly tested. Instead of sticking coordinates into pushbufs, the vertex shader is modified to read them from a constbuf, indexed by vertex id. This approach could be used for all nvc0 generations, but I didn't want to rock the boat. Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> ---
2016 Oct 17
0
[PATCH] exa: add GM10x acceleration support
Looks reasonable, some minor comments below. On 10/16/2016 02:06 AM, Ilia Mirkin wrote: > rendercheck -f a8r8g8b8 passes as much as on a GK208, and xv appears to > work. Very lightly tested. > > Instead of sticking coordinates into pushbufs, the vertex shader is > modified to read them from a constbuf, indexed by vertex id. This > approach could be used for all nvc0 generations,
2016 Oct 27
11
[PATCH v2 0/7] Add Maxwell support
I believe I've addressed all the feedback from the first time around, and also made fixes necessary for GM20x based on testing results. I believe now it should actually work for all GM10x and GM20x. Further, GP10x should be very easy to add, but without someone to actually test I didn't want to claim support for it. Ilia Mirkin (7): exa: add GM10x acceleration support hwdefs: update