Displaying 12 results from an estimated 12 matches for "nouveau_bo_tile_layout".
2013 Jul 15
3
[PATCH] drm/nouveau: do not move buffers when not needed
...k because
the vm hides all the tiling translations, and the engines will read the raw bitstream correctly.
8<---
This prevents buffer moves from being done on NV50+, where remapping is not needed because
the bar has its own VM, instead of only having the first BAR1-size chunk of VRAM accessible.
nouveau_bo_tile_layout is always 0 on < NV_50.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst at canonical.com>
---
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c
index d506da5..762bfcd 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau...
2013 Jul 12
2
[PATCH] drm/nouveau: kill nouveau_ttm_fault_reserve_notify handler to prevent useless buffer moves
...;
- u32 mappable = pci_resource_len(device->pdev, 1) >> PAGE_SHIFT;
-
- /* as long as the bo isn't in vram, and isn't tiled, we've got
- * nothing to do here.
- */
- if (bo->mem.mem_type != TTM_PL_VRAM) {
- if (nv_device(drm->device)->card_type < NV_50 ||
- !nouveau_bo_tile_layout(nvbo))
- return 0;
- }
-
- /* make sure bo is in mappable vram */
- if (bo->mem.start + bo->mem.num_pages < mappable)
- return 0;
-
-
- nvbo->placement.fpfn = 0;
- nvbo->placement.lpfn = mappable;
- nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_VRAM, 0);
- return nouveau_bo_validate(...
2013 Sep 02
0
[PATCH] drm/nv50-: fix tiled memory layout checks
...nouveau_bo(bo);
u64 length = (new_mem->num_pages << PAGE_SHIFT);
- u64 src_offset = node->vma[0].offset;
- u64 dst_offset = node->vma[1].offset;
+ u64 src_offset = old_node->vma[0].offset;
+ u64 dst_offset = old_node->vma[1].offset;
u32 size;
int ret;
size = 18;
- if (nouveau_bo_tile_layout(nvbo)) {
- size += 6 * (old_mem->mem_type == TTM_PL_VRAM);
- size += 6 * (new_mem->mem_type == TTM_PL_VRAM);
- }
+ size += 6 * (!!old_node->memtype + !!new_node->memtype);
size *= (length + (4 * 1024 * 1024) - 1) / (4 * 1024 * 1024);
ret = RING_SPACE(chan, size);
if (ret)
@@ -85...
2013 Sep 04
1
[PATCH] drm/nouveau: do not move buffers when not needed
...ut later about the bug with excessive moves causing a major slowdown.
>> 8<---
>> This prevents buffer moves from being done on NV50+, where remapping is not needed because
>> the bar has its own VM, instead of only having the first BAR1-size chunk of VRAM accessible.
>> nouveau_bo_tile_layout is always 0 on < NV_50.
>>
>> Signed-off-by: Maarten Lankhorst <maarten.lankhorst at canonical.com>
>> ---
>> diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c
>> index d506da5..762bfcd 100644
>> --- a/drivers/gpu/d...
2013 Mar 05
0
[PATCH] drm/nouveau/nv50: use correct tiling methods for m2mf buffer moves
...vers/gpu/drm/nouveau/nouveau_bo.c
@@ -801,7 +801,7 @@ nv50_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
stride = 16 * 4;
height = amount / stride;
- if (new_mem->mem_type == TTM_PL_VRAM &&
+ if (old_mem->mem_type == TTM_PL_VRAM &&
nouveau_bo_tile_layout(nvbo)) {
ret = RING_SPACE(chan, 8);
if (ret)
@@ -823,7 +823,7 @@ nv50_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
BEGIN_NV04(chan, NvSubCopy, 0x0200, 1);
OUT_RING (chan, 1);
}
- if (old_mem->mem_type == TTM_PL_VRAM &&
+ if (new_mem->m...
2013 Sep 04
0
[PATCH] drm/nouveau: do not move buffers when not needed
...uite possibly counter-productive to use a tiled layout
for a linear data structure...
> 8<---
> This prevents buffer moves from being done on NV50+, where remapping is not needed because
> the bar has its own VM, instead of only having the first BAR1-size chunk of VRAM accessible.
> nouveau_bo_tile_layout is always 0 on < NV_50.
>
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst at canonical.com>
> ---
> diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c
> index d506da5..762bfcd 100644
> --- a/drivers/gpu/drm/nouveau/nouveau_bo.c...
2014 Sep 26
0
[RFC PATCH 6/7] drm/nouveau: Support marking buffers for explicit sync
...et = nouveau_gem_set_info(file_priv, gem, req);
+ drm_gem_object_unreference_unlocked(gem);
+ return ret;
+}
diff --git a/drm/nouveau_gem.h b/drm/nouveau_gem.h
index 7454dea..abac606 100644
--- a/drm/nouveau_gem.h
+++ b/drm/nouveau_gem.h
@@ -7,7 +7,7 @@
#include "nouveau_bo.h"
#define nouveau_bo_tile_layout(nvbo) \
- ((nvbo)->tile_flags & NOUVEAU_GEM_TILE_LAYOUT_MASK)
+ ((nvbo)->bo_flags & NOUVEAU_GEM_TILE_LAYOUT_MASK)
static inline struct nouveau_bo *
nouveau_gem_object(struct drm_gem_object *gem)
@@ -18,7 +18,7 @@ nouveau_gem_object(struct drm_gem_object *gem)
/* nouveau_gem.c...
2013 Jul 15
0
[PATCH] drm/nouveau: kill nouveau_ttm_fault_reserve_notify handler to prevent useless buffer moves
...gt; - /* as long as the bo isn't in vram, and isn't tiled, we've got
> - * nothing to do here.
> - */
> - if (bo->mem.mem_type != TTM_PL_VRAM) {
> - if (nv_device(drm->device)->card_type < NV_50 ||
> - !nouveau_bo_tile_layout(nvbo))
> - return 0;
> - }
> -
> - /* make sure bo is in mappable vram */
> - if (bo->mem.start + bo->mem.num_pages < mappable)
> - return 0;
> -
> -
> - nvbo->placement.fpfn = 0;
> - nvbo-&g...
2013 Nov 12
0
[PATCH 2/7] drm/nv50-: untile mmap'd bo's
...dev, 1) >> PAGE_SHIFT;
+ int ret;
/* as long as the bo isn't in vram, and isn't tiled, we've got
* nothing to do here.
@@ -1332,10 +1336,20 @@ nouveau_ttm_fault_reserve_notify(struct ttm_buffer_object *bo)
if (nv_device(drm->device)->card_type < NV_50 ||
!nouveau_bo_tile_layout(nvbo))
return 0;
+
+ if (bo->mem.mem_type == TTM_PL_SYSTEM) {
+ nouveau_bo_placement_set(nvbo, TTM_PL_TT, 0);
+
+ ret = nouveau_bo_validate(nvbo, false, false);
+ if (ret)
+ return ret;
+ }
+ return 0;
}
/* make sure bo is in mappable vram */
- if (bo->mem.start + bo->...
2013 Nov 12
6
[PATCH 1/7] drm/nouveau: fix m2mf copy to tiled gart
...(length) {
u32 amount, stride, height;
+ ret = RING_SPACE(chan, 18 + 6 * (src_tiled + dst_tiled));
+ if (ret)
+ return ret;
+
amount = min(length, (u64)(4 * 1024 * 1024));
stride = 16 * 4;
height = amount / stride;
- if (old_mem->mem_type == TTM_PL_VRAM &&
- nouveau_bo_tile_layout(nvbo)) {
- ret = RING_SPACE(chan, 8);
- if (ret)
- return ret;
-
+ if (src_tiled) {
BEGIN_NV04(chan, NvSubCopy, 0x0200, 7);
OUT_RING (chan, 0);
OUT_RING (chan, 0);
@@ -831,19 +831,10 @@ nv50_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
OUT_RING...
2014 Feb 06
13
[Bug 74613] New: [v3.14-rc1] [nv34] nouveau: get 0x10000000 put 0x0000ed30 state 0xc0000000 (err: MEM_FAULT) push 0x00000000
https://bugs.freedesktop.org/show_bug.cgi?id=74613
Priority: medium
Bug ID: 74613
Assignee: nouveau at lists.freedesktop.org
Summary: [v3.14-rc1] [nv34] nouveau: get 0x10000000 put
0x0000ed30 state 0xc0000000 (err: MEM_FAULT) push
0x00000000
QA Contact: xorg-team at lists.x.org
Severity: normal
2014 Sep 26
14
[RFC] Explicit synchronization for Nouveau
Hi guys,
I'd like to start a new thread about explicit fence synchronization. This time
with a Nouveau twist. :-)
First, let me define what I understand by implicit/explicit sync:
Implicit synchronization
* Fences are attached to buffers
* Kernel manages fences automatically based on buffer read/write access
Explicit synchronization
* Fences are passed around independently
* Kernel takes