search for: nouveau_bo_sync_for_device

...rs/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c index b6dc85c614be..0886f47e5244 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo.c +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c @@ -407,6 +407,8 @@ nouveau_bo_validate(struct nouveau_bo *nvbo, bool interruptible, { int ret; + nouveau_bo_sync_for_device(nvbo); + ret = ttm_bo_validate(&nvbo->bo, &nvbo->placement, interruptible, no_wait_gpu); if (ret) @@ -487,6 +489,36 @@ nouveau_bo_invalidate_caches(struct ttm_bo_device *bdev, uint32_t flags) return 0; } +#ifdef NOUVEAU_NEED_CACHE_SYNC +void +nouveau_bo_sync_for_cpu...

.../nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c index 67e9e8e2e2ec..47e4e8886769 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo.c +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c @@ -402,6 +402,60 @@ nouveau_bo_unmap(struct nouveau_bo *nvbo) ttm_bo_kunmap(&nvbo->kmap); } +void +nouveau_bo_sync_for_device(struct nouveau_bo *nvbo) +{ + struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev); + struct nouveau_device *device = nouveau_dev(drm->dev); + struct ttm_dma_tt *ttm_dma = (struct ttm_dma_tt *)nvbo->bo.ttm; + int i; + + if (!ttm_dma) + return; + + if (nv_device_is_cpu_coherent(device) ||...

...au/nouveau_bo.c > index 67e9e8e2e2ec..47e4e8886769 100644 > --- a/drivers/gpu/drm/nouveau/nouveau_bo.c > +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c > @@ -402,6 +402,60 @@ nouveau_bo_unmap(struct nouveau_bo *nvbo) > ttm_bo_kunmap(&nvbo->kmap); > } > > +void > +nouveau_bo_sync_for_device(struct nouveau_bo *nvbo) > +{ > + struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev); > + struct nouveau_device *device = nouveau_dev(drm->dev); > + struct ttm_dma_tt *ttm_dma = (struct ttm_dma_tt *)nvbo->bo.ttm; > + int i; > + > + if (!ttm_dma) > + return; >...

...#define NOUVEAU_NEED_CACHE_SYNC > +#endif I know I gave this as an example myself when we discussed this offline, but I'm now thinking that this might actually be better off in Kconfig. > +#ifdef NOUVEAU_NEED_CACHE_SYNC > +void nouveau_bo_sync_for_cpu(struct nouveau_bo *); > +void nouveau_bo_sync_for_device(struct nouveau_bo *); > +#else > +static inline void > +nouveau_bo_sync_for_cpu(struct nouveau_bo *) > +{ > +} > + > +static inline void > +nouveau_bo_sync_for_device(struct nouveau_bo *) > +{ > +} > +#endif > + > + There's a gratuituous blank line here....

This small series introduces TTM helper functions as well as Nouveau hooks that are needed to ensure buffer coherency on ARM. Most of this series is a forward-port of some patches Lucas Stach sent last year and that are also needed for Nouveau GK20A support: http://lists.freedesktop.org/archives/nouveau/2013-August/014026.html Another patch takes care of flushing the CPU write-buffer when

Another revision of this patchset critical for GK20A to operate. Previous attempts were exclusively using either TTM's regular page allocator or the DMA API one. Both have their advantages and drawbacks: the page allocator is fast but requires explicit synchronization on non-coherent architectures, whereas the DMA allocator always returns coherent memory, but is also slower, creates a

...s/gpu/drm/nouveau/nouveau_bo.c > index b6dc85c614be..0886f47e5244 100644 > --- a/drivers/gpu/drm/nouveau/nouveau_bo.c > +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c > @@ -407,6 +407,8 @@ nouveau_bo_validate(struct nouveau_bo *nvbo, bool interruptible, > { > int ret; > > + nouveau_bo_sync_for_device(nvbo); > + > ret = ttm_bo_validate(&nvbo->bo, &nvbo->placement, > interruptible, no_wait_gpu); > if (ret) > @@ -487,6 +489,36 @@ nouveau_bo_invalidate_caches(struct ttm_bo_device *bdev, uint32_t flags) > return 0; > } > > +#ifdef NOUVEAU_N...

It has been a couple of months since v4 - apologies for this. v4 has not received many comments, but this version addresses them and makes a new attempt at pushing the critical bit for GK20A and Nouveau on ARM in general. As a reminder, this series addresses the memory coherency issue that we are seeing on ARM platforms. Contrary to x86 which invalidates the PCI caches whenever a write is made by

...[<c049a949>] ? sched_clock_local+0x49/0x180 [ 37.496961] [<c07b9a2d>] debug_dma_sync_single_for_device+0x7d/0x90 [ 37.496989] [<f7e22298>] ? ttm_bo_del_sub_from_lru+0x18/0x50 [ttm] [ 37.497006] [<c040b650>] ? text_poke_bp+0xd0/0xd0 [ 37.497144] [<f85ba340>] nouveau_bo_sync_for_device+0x80/0xc0 [nouveau] [ 37.497228] [<f85ba474>] nouveau_bo_validate+0x34/0x40 [nouveau] [ 37.497310] [<f85ba608>] nouveau_bo_pin+0x188/0x290 [nouveau] [ 37.497391] [<f85b8b60>] ? nv10_bo_put_tile_region+0x80/0x80 [nouveau] [ 37.497413] [<f85cd830>] nouveau_channel_...

...>>--- a/drivers/gpu/drm/nouveau/nouveau_bo.c > >>+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c > >>@@ -402,6 +402,60 @@ nouveau_bo_unmap(struct nouveau_bo *nvbo) > >> ttm_bo_kunmap(&nvbo->kmap); > >> } > >> > >>+void > >>+nouveau_bo_sync_for_device(struct nouveau_bo *nvbo) > >>+{ > >>+ struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev); > >>+ struct nouveau_device *device = nouveau_dev(drm->dev); > >>+ struct ttm_dma_tt *ttm_dma = (struct ttm_dma_tt *)nvbo->bo.ttm; > >>+ int i; > &gt...

...8e2e2ec..47e4e8886769 100644 >> --- a/drivers/gpu/drm/nouveau/nouveau_bo.c >> +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c >> @@ -402,6 +402,60 @@ nouveau_bo_unmap(struct nouveau_bo *nvbo) >> ttm_bo_kunmap(&nvbo->kmap); >> } >> >> +void >> +nouveau_bo_sync_for_device(struct nouveau_bo *nvbo) >> +{ >> + struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev); >> + struct nouveau_device *device = nouveau_dev(drm->dev); >> + struct ttm_dma_tt *ttm_dma = (struct ttm_dma_tt *)nvbo->bo.ttm; >> + int i; >> + >> + if (!t...

For this v2 I have fixed the patches that are non-controversial (all Lucas' :)) and am resubmitting them in the hope that they will get merged. This will just leave the issue of Nouveau system-memory buffers mapping to be solved. This issue is quite complex, so let me summarize the situation and the data I have at hand. ARM caching is like a quantum world where Murphy's law constantly

...c046203e>] warn_slowpath_fmt+0x3e/0x60 > [<c07b9029>] check_sync+0x169/0x6e0 > [<c07b96ad>] debug_dma_sync_single_for_device+0x7d/0x90 > [<f7ece298>] ? ttm_bo_del_sub_from_lru+0x18/0x50 [ttm] > [<c040bef0>] ? text_poke_bp+0xd0/0xd0 > [<f85d96db>] nouveau_bo_sync_for_device+0x8b/0xa0 [nouveau] > [<f85d97c4>] nouveau_bo_validate+0x34/0x40 [nouveau] > [<f85d9958>] nouveau_bo_pin+0x188/0x290 [nouveau] > [<f85d7fe0>] ? nv10_bo_put_tile_region+0x80/0x80 [nouveau] > [<f85ec7fd>] nouveau_channel_prep+0xfd/0x2c0 [nouveau] > [<f85...

...drm_device *dev, void *data, ret = lret; nouveau_bo_sync_for_cpu(nvbo); - drm_gem_object_unreference_unlocked(gem); + drm_gem_object_put_unlocked(gem); return ret; } @@ -913,7 +913,7 @@ nouveau_gem_ioctl_cpu_fini(struct drm_device *dev, void *data, nvbo = nouveau_gem_object(gem); nouveau_bo_sync_for_device(nvbo); - drm_gem_object_unreference_unlocked(gem); + drm_gem_object_put_unlocked(gem); return 0; } @@ -930,7 +930,7 @@ nouveau_gem_ioctl_info(struct drm_device *dev, void *data, return -ENOENT; ret = nouveau_gem_info(file_priv, gem, req); - drm_gem_object_unreference_unlocked(gem); + dr...

...drm_device *dev, void *data, ret = lret; nouveau_bo_sync_for_cpu(nvbo); - drm_gem_object_unreference_unlocked(gem); + drm_gem_object_put_unlocked(gem); return ret; } @@ -896,7 +896,7 @@ nouveau_gem_ioctl_cpu_fini(struct drm_device *dev, void *data, nvbo = nouveau_gem_object(gem); nouveau_bo_sync_for_device(nvbo); - drm_gem_object_unreference_unlocked(gem); + drm_gem_object_put_unlocked(gem); return 0; } @@ -913,7 +913,7 @@ nouveau_gem_ioctl_info(struct drm_device *dev, void *data, return -ENOENT; ret = nouveau_gem_info(file_priv, gem, req); - drm_gem_object_unreference_unlocked(gem); + dr...

...9,7 +969,7 @@ nouveau_gem_ioctl_cpu_prep(struct drm_de ret = lret; nouveau_bo_sync_for_cpu(nvbo); - drm_gem_object_unreference_unlocked(gem); + drm_gem_object_put_unlocked(gem); return ret; } @@ -988,7 +988,7 @@ nouveau_gem_ioctl_cpu_fini(struct drm_de nvbo = nouveau_gem_object(gem); nouveau_bo_sync_for_device(nvbo); - drm_gem_object_unreference_unlocked(gem); + drm_gem_object_put_unlocked(gem); return 0; } @@ -1005,7 +1005,7 @@ nouveau_gem_ioctl_info(struct drm_device return -ENOENT; ret = nouveau_gem_info(file_priv, gem, req); - drm_gem_object_unreference_unlocked(gem); + drm_gem_object_put_u...

...; nouveau_bo_sync_for_cpu(nvbo); > - drm_gem_object_unreference_unlocked(gem); > + drm_gem_object_put_unlocked(gem); > > return ret; > } > @@ -896,7 +896,7 @@ nouveau_gem_ioctl_cpu_fini(struct drm_device *dev, void *data, > nvbo = nouveau_gem_object(gem); > > nouveau_bo_sync_for_device(nvbo); > - drm_gem_object_unreference_unlocked(gem); > + drm_gem_object_put_unlocked(gem); > return 0; > } > > @@ -913,7 +913,7 @@ nouveau_gem_ioctl_info(struct drm_device *dev, void *data, > return -ENOENT; > > ret = nouveau_gem_info(file_priv, gem, req); &gt...

On 11/10/2015 05:00 PM, Thierry Reding wrote: > On Tue, Nov 10, 2015 at 03:54:52PM +0100, Mario Kleiner wrote: >> From: Daniel Vetter <daniel.vetter at ffwll.ch> >> >> Apparently pre-nv50 pageflip events happen before the actual vblank >> period. Therefore that functionality got semi-disabled in >> >> commit af4870e406126b7ac0ae7c7ce5751f25ebe60f28

...j kmap; > struct list_head head; > + struct list_head io_reserve_lru; > > /* protected by ttm_bo_reserve() */ > struct drm_file *reserved_by; > @@ -92,6 +93,8 @@ int nouveau_bo_validate(struct nouveau_bo *, bool interruptible, > bool no_wait_gpu); > void nouveau_bo_sync_for_device(struct nouveau_bo *nvbo); > void nouveau_bo_sync_for_cpu(struct nouveau_bo *nvbo); > +void nouveau_bo_add_io_reserve_lru(struct ttm_buffer_object *bo); > +void nouveau_bo_del_io_reserve_lru(struct ttm_buffer_object *bo); > > /* TODO: submit equivalent to TTM generic API upstre...

...k_sync+0x169/0x6e0 [<c046203e>] warn_slowpath_fmt+0x3e/0x60 [<c07b9029>] check_sync+0x169/0x6e0 [<c07b96ad>] debug_dma_sync_single_for_device+0x7d/0x90 [<f7ece298>] ? ttm_bo_del_sub_from_lru+0x18/0x50 [ttm] [<c040bef0>] ? text_poke_bp+0xd0/0xd0 [<f85d96db>] nouveau_bo_sync_for_device+0x8b/0xa0 [nouveau] [<f85d97c4>] nouveau_bo_validate+0x34/0x40 [nouveau] [<f85d9958>] nouveau_bo_pin+0x188/0x290 [nouveau] [<f85d7fe0>] ? nv10_bo_put_tile_region+0x80/0x80 [nouveau] [<f85ec7fd>] nouveau_channel_prep+0xfd/0x2c0 [nouveau] [<f85eca17>] nouveau_channe...