Displaying 2 results from an estimated 2 matches for "not7".
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2008 Oct 01
0
[LLVMdev] complex branching generation
...;
target datalayout =
"e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin9.5"
define void @test_fc_while_and(float %x, float %y, float* %result)
nounwind optsize {
entry:
%.not7 = fcmp une float %x, 0.000000e+00 ; <i1> [#uses=1]
%0 = fcmp une float %y, 0.000000e+00 ; <i1> [#uses=2]
%or.cond8 = and i1 %.not7, %0 ; <i1> [#uses=1]
br i1 %or.cond8, label %bb, label %bb4
bb: ; preds = %bb, %entry
%x_addr.06 = phi float [ %x, %entry ], [ %3, %bb ] ; &...
2008 Oct 01
2
[LLVMdev] complex branching generation
LLVM seems to be generating way too complex of branching based on the
short-circuit optimization. The code in question is as follows:
define void @ test_fc_while_and(float %x, float %y, float addrspace(11)*
%result) nounwind {
entry:
%tobool3 = fcmp une float %x, 0.000000e+000 ; <i1>
[#uses=1]
%tobool24 = fcmp une float %y, 0.000000e+000 ;