Displaying 2 results from an estimated 2 matches for "nosubop".
2009 Jul 07
1
[LLVMdev] LLVM code target dependent generator question
...DD instruction is defined in the InstrInfo.td file as following:
def I32RC : RegisterClass<"MyMachine", [i32], 32, [DefReg]>;
def P32RC : RegisterClass<"MyMachine", [iPTR], 32, [DefReg]>; -> I get error from tablegen if I use iPTR
def MyAdd : MyInst
<
myadd,
nosubop,
(outs I32RC:$dst),
(ins I32RC:$src1, I32RC:$src2),
“add $dst, $src1, $src2",
[(set rc:$dst, (add I32RC:$src1, I32RC:$src2))]
def MyPointerAdd : MyInst
<
mypointeradd,
nosubop,
(outs P32RC:$dst),
(ins P32RC:$src1, P32RC:$src2),
“pointer_add $dst, $src1, $src2",
[(set rc:$dst,...
2009 Jul 07
0
[LLVMdev] LLVM code target dependent generator question
...DD instruction is defined in the InstrInfo.td file as following:
def I32RC : RegisterClass<"MyMachine", [i32], 32, [DefReg]>;
def P32RC : RegisterClass<"MyMachine", [iPTR], 32, [DefReg]>; -> I get error from tablegen if I use iPTR
def MyAdd : MyInst
<
myadd,
nosubop,
(outs I32RC:$dst),
(ins I32RC:$src1, I32RC:$src2),
“add $dst, $src1, $src2",
[(set rc:$dst, (add I32RC:$src1, I32RC:$src2))]
def MyPointerAdd : MyInst
<
mypointeradd,
nosubop,
(outs P32RC:$dst),
(ins P32RC:$src1, P32RC:$src2),
“pointer_add $dst, $src1, $src2",
[(set rc:$dst, (ad...