search for: northbridg

Dear CentOS community, Can someone give me clues as to whether my memory is going bad or I am having problem with the actual board. Thank you in advace. I am getting the following error via stdout and also in /var/log/messages Aug 15 20:37:10 saturn kernel: Northbridge Error, node 0 Aug 15 20:37:10 saturn kernel: ECC/ChipKill ECC error. Aug 15 20:37:10 saturn kernel: EDAC amd64 MC0: CE ERROR_ADDRESS= 0x1b9e740 Aug 15 20:37:10 saturn kernel: EDAC MC0: CE page 0x1b9e, offset 0x740, grain 0, syndrome 0x1cc8, row 2, channel 0, label "": amd64_edac Aug 15 2...

Seems like overnight every motherboard that worked with linux has DROPPED off the face of the earth. Every motherboard I looked at is using the realtek 8111 chipset and a northbridge that is not supported. Example: GIGABYTE GA-970A-DS3, does not work with linux I tried disabling the onboard NIC and using a PCI-E intel card I always use and that would not work either. The north or south bridge is messing with the network card. The card asks for a PXE boot but after centos sta...

Hello all..... I would like to know if anyone here has had good experience with this Supermicro motherboard.....http://supermicro.com/products/motherboard/P4/E7221/P8SCT.cfm I am thinking about using it in an entry level mail and file server with a 3ware card and 200 GB SATA drives. Cost is a factor here otherwise I would go for an Opteron board instead. JC

Hello, since applying the patches related to XSA-36 Xen recognizes a broken IVRS ACPI table and disables I/O virtualisation. I contacted the manufacturer of the mainboard/BIOS and they want to help me by providing a patched BIOS - so far so good. However, they need details about what to fix, which I don''t know either. Could you pls. give me some hints which I can forward to the

...the IO-Virtualisation does not work any more as discussed on this mailinglist [0] and [1]. I like to ask, if there is an "official" solution in sight. I''m not sure about my alternatives. How "dangerous" is the mentioned IRQ sharing in [1]? May I just live with the NorthBridge disabled IOAPIC? [0] http://lists.xen.org/archives/html/xen-devel/2013-03/msg01016.html [1] http://lists.xen.org/archives/html/xen-devel/2013-04/msg02349.html

...ce 00e5 (rev a2) 0000:00:0a.0 IDE interface: nVidia Corporation: Unknown device 00e3 (rev a2) 0000:00:0b.0 PCI bridge: nVidia Corporation: Unknown device 00e2 (rev a2) 0000:00:0e.0 PCI bridge: nVidia Corporation: Unknown device 00ed (rev a2) 0000:00:18.0 Host bridge: Advanced Micro Devices [AMD] K8 NorthBridge 0000:00:18.1 Host bridge: Advanced Micro Devices [AMD] K8 NorthBridge 0000:00:18.2 Host bridge: Advanced Micro Devices [AMD] K8 NorthBridge 0000:00:18.3 Host bridge: Advanced Micro Devices [AMD] K8 NorthBridge 0000:01:00.0 VGA compatible controller: ATI Technologies Inc RV350 AP [Radeon 9600] 000...

...ching about the bios > settings for IOMMU, and it seems to be an active area of > Linux development. It seems to be some sort of aperature > possibly used as a temporary storage space for information > destined for addresses > 4gig? It also appears to tied into > the onboard (northbridge) GART stuff. I believe the engineers > MCE/memory comments apply to the controller memory, as I > would expect a clearer MCE message if we got an ECC fault on > main memory. > > If anyone can recommed a good "big linux", or amd64 linux > list, I''d be happi...

...t. The installation is the same, I cloned the hard drive... The machine that is working fine is a Asus M5A97 R.20 + Zogis GeForce GT210 The machine that is with blank screen after Xorg is loaded is ASRock 980DE3/U3S3 + Point of View GeForce GT210. What can I do to solve this problem? ASRock has: Northbridge: AMD RX881/760G; Southbridge: AMD SB710 And Asus has: Northbridge: AMD 970; Southbridge: AMD SB950 Tnx for your help! *Other outputs:* *-core description: Motherboard product: M5A97 LE R2.0 vendor: ASUSTeK COMPUTER INC. physical id: 0 version: Rev 1.xx serial:...

Hi, I have noticed that the Intel VT-d patch has merged into unstable source tree. My question is how to use the PCI pass-through feature? The Intel Q35 express northbridge chipset (with VT-d) motherboard is out. I am eager to try it out. Thanks! HY _______________________________________________ Xen-users mailing list Xen-users@lists.xensource.com http://lists.xensource.com/xen-users

Hey, folks, I've just started seeing Apr 12 13:09:59 <server> kernel: [Hardware Error]: MC4_STATUS[Over|CE|MiscV|-|AddrV|-|Poison|CECC]: 0xdd0accf2001d011b Apr 12 13:09:59 <server> kernel: [Hardware Error]: Northbridge Error (node 1, core 1): ECC error in L3 cache tag. Apr 12 13:09:59 <server> kernel: [Hardware Error]: cache level: L3/GEN, tx: GEN, mem-tx: RD Apr 12 13:09:59 <server> kernel: [Hardware Error]: Machine check events logged I'm guessing, unhappily, that this means the on-chip cache,...

I know most of the motherboards based off of the Intel Q35 northbridge usually have VT-d options for it to be enabled or disabled in the BIOS.  I''ve heard the same for Intel 5400''s and Intel 3200/3210''s but been looking through manuals for various server boards and don''t see VT-d options in the BIOS. However, I was wondering if an...

...ate down, C1-clock ramping adjusts the TSC increment so that the TSC appears to continue incrementing at the undivided clock reference rate of the current P-state. BIOS enables and configures the value of the divisor by programming the PMM7 registers in the processor''s integrated Northbridge. The operating system initiates the mechanism by issuing the HLT instruction. As each core in an AMD Dual-core processor has its own clock-grid, only the core that issues the HLT is affected. The adjustment of a core''s TSC increment guards against most causes of drift. Howeve...

...require a new chipset and/or a hack > switch to ignore compatibility. Isn't the VT-d register space separate from other Q35 features and backwards-compatible? You could even add it to PIIX in theory just by adding a DMAR. It's not like for example SMRAM, where the registers are in the northbridge configuration space and move around in every chipset generation. > > ("Any kind of stability" actually didn't include crashes; those are not > > expected :)) > > > > The Google patches for userspace PIC and IOAPIC are proceeding well, so > > hopefully...

...require a new chipset and/or a hack > switch to ignore compatibility. Isn't the VT-d register space separate from other Q35 features and backwards-compatible? You could even add it to PIIX in theory just by adding a DMAR. It's not like for example SMRAM, where the registers are in the northbridge configuration space and move around in every chipset generation. > > ("Any kind of stability" actually didn't include crashes; those are not > > expected :)) > > > > The Google patches for userspace PIC and IOAPIC are proceeding well, so > > hopefully...

I'm running CentOS 5.1 with all updates, and the xen kernel. For some reason the OS is not seeing the full amount of ram. #uname -a Linux CentOS-VM-A 2.6.18-53.1.21.el5xen #1 SMP Tue May 20 10:03:27 EDT 2008 x86_64 x86_64 x86_64 GNU/Linux # free total used free shared buffers cached Mem: 6104064 3445136 2658928 0 1412236

I recently added a Seagate 400Gb SATA drive to my system, and it has been behaving strangely since I put it in. for one thing, the BIOS S.M.A.R.T. came up with a warning the last time I booted with it enabled, saying that I should backup my data and replace the disk (!). I still have not made any irreversible data transfers to this drive, and I have some time yet to take it back, but I'd

...E3-1220v2 CPU. What we're seeing: - Syba Sil3124 PCIe cards are only being detected when installed in PCIe Slot 4 -- The motherboard documentation shows that this is the only slot connected to the Intel C202/204 chipset on the motherboard -- Slots 5, 6, and 7 are connected to the integrated northbridge on the Ivy Bridge CPU (there is no slot 1, 2, or 3) FreeBSD won't detect even a single Sil3124 card installed in PCIe slot 5, 6, or 7. If we put an Intel Dual-port NIC in either of one of these slots, it is detected just fine. I've attached a verbose dmesg.boot from this box running...

Hi, This is updated xen vMCE design foils, according to comments from community recently. This foils focus on vMCE part of Xen MCA, so as Keir said, it''s some dense. Later Will will present a document to elaborate more, including Intel MCA and surrounding features and Xen implementation. Thanks, Jinsong

...23:58:27 hXXX kernel: Machine check events logged Jul 6 01:38:27 hXXX kernel: Machine check events logged Jul 6 04:48:27 hXXX kernel: Machine check events logged And in the /var/log/mcelog I see: MCE 0 HARDWARE ERROR. This is *NOT* a software problem! Please contact your hardware vendor CPU 0 4 northbridge TSC 111a60c5584d4 [at 2500 Mhz 1 days 9:25:51 uptime (unreliable)] MISC c008000001000000 ADDR 1148f5940 Northbridge NB Array Error bit35 = err cpu3 bit42 = L3 subcache in error bit 0 bit43 = L3 subcache in error bit 1 bit46 = corrected ecc error bit59 = misc er...

...tures and > backwards-compatible? You could even add it to PIIX in theory just by > adding a DMAR. Yes, it's practically working, but it's not accurate /wrt how that hardware looked like in reality. > > It's not like for example SMRAM, where the registers are in the > northbridge configuration space and move around in every chipset generation. > >>> ("Any kind of stability" actually didn't include crashes; those are not >>> expected :)) >>> >>> The Google patches for userspace PIC and IOAPIC are proceeding well, so >...