Displaying 3 results from an estimated 3 matches for "nonamemangl".
2014 Oct 26
2
[LLVMdev] Masked vector intrinsics and name mangling
...intrinsics:
%res = call <16 x i32> @llvm.masked.load (i32* %addr, <16 x i32>%passthru, i32 4, <16 x i1> %mask)
def int_masked_load :
Intrinsic<[llvm_anyvector_ty], [llvm_anyptr_ty, llvm_anyvector_ty, llvm_anyint_ty, llvm_anyvector_ty],
[IntrReadArgMem, NoNameMangling]>; // new property
It will significantly simplify reading and manual writing.
What do you think?
Thank you.
- Elena
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Intel Israel (74) Limited
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2014 Oct 26
2
[LLVMdev] Masked vector intrinsics and name mangling
....load (i32* %addr, <16 x
>>> i32>%passthru, i32 4, <16 x i1> %mask)
>>>
>>> def int_masked_load :
>>> Intrinsic<[llvm_anyvector_ty], [llvm_anyptr_ty, llvm_anyvector_ty,
>>> llvm_anyint_ty, llvm_anyvector_ty], [IntrReadArgMem,
>>> NoNameMangling]>;
>>> // new property
>>>
>>> It will significantly simplify reading and manual writing.
>>> What do you think?
>>
>> We already have this kind of situation for @llvm.memcpy and friends,
>> and while it can make the IR look verbose at t...
2014 Oct 26
2
[LLVMdev] Masked vector intrinsics and name mangling
...sics:
> %res = call <16 x i32> @llvm.masked.load (i32* %addr, <16 x
> i32>%passthru, i32 4, <16 x i1> %mask)
>
> def int_masked_load :
> Intrinsic<[llvm_anyvector_ty], [llvm_anyptr_ty, llvm_anyvector_ty,
> llvm_anyint_ty, llvm_anyvector_ty], [IntrReadArgMem, NoNameMangling]>;
> // new property
>
> It will significantly simplify reading and manual writing.
> What do you think?
We already have this kind of situation for @llvm.memcpy and friends, and while it can make the IR look verbose at times, we have reasonable interfaces for creating and manip...