Displaying 19 results from an estimated 19 matches for "noat".
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2013 Mar 05
0
[LLVMdev] [MIPS] How can I add a constraint to LLVM/Clang for MIPS BE?
Maybe try:
.set noat
AT is needed to create certain instructions from pseudo instructions, so
you have to be careful how you use this. Some instructions that you can
use in Mips assembler are in fact pseudos.
While AT is not available to it (.set noat), the assembler can not
assemble certain pseudos for you.
On 0...
2013 Mar 04
2
[LLVMdev] [MIPS] How can I add a constraint to LLVM/Clang for MIPS BE?
Hi Jack,
On Sat, Mar 2, 2013 at 8:15 AM, Jack Carter <Jack.Carter at imgtec.com> wrote:
> Jia,
>
> I made what I believe to be the correct changes and rebuilt clang and llc. Are the results what you expected? I so I will prepare the patches for commitment.
>
> Jack
>
> clang ../mips_R_JiaLiu.c -o mips_R_JiaLiu.ll -emit-llvm -O3 -S -target mipsel-unknown-linux -std=gnu89
2013 Feb 20
3
[LLVMdev] Is va_arg correct on Mips backend?
....abi32
.previous
.file "ch8_3.bc"
.text
.globl _Z5sum_iiz
.align 2
.type _Z5sum_iiz, at function
.set nomips16 # @_Z5sum_iiz
.ent _Z5sum_iiz
_Z5sum_iiz:
.cfi_startproc
.frame $sp,64,$ra
.mask 0x80000000,-4
.fmask 0x00000000,0
.set noreorder
.set nomacro
.set noat
# BB#0:
lui $2, %hi(_gp_disp)
addiu $2, $2, %lo(_gp_disp)
addiu $sp, $sp, -64
$tmp2:
.cfi_def_cfa_offset 64
sw $ra, 60($sp) # 4-byte Folded Spill
$tmp3:
.cfi_offset 31, -4
addu $gp, $2, $25
sw $7, 76($sp)
sw $6, 72($sp)
sw $5, 68($sp)
lw $3, %got(__stack_chk_guard)($gp)
lw $1...
2013 Feb 20
0
[LLVMdev] Is va_arg correct on Mips backend?
...> .globl _Z5sum_iiz
> .align 2
> .type _Z5sum_iiz, at function
> .set nomips16 # @_Z5sum_iiz
> .ent _Z5sum_iiz
> _Z5sum_iiz:
> .cfi_startproc
> .frame $sp,64,$ra
> .mask 0x80000000,-4
> .fmask 0x00000000,0
> .set noreorder
> .set nomacro
> .set noat
> # BB#0:
> lui $2, %hi(_gp_disp)
> addiu $2, $2, %lo(_gp_disp)
> addiu $sp, $sp, -64
> $tmp2:
> .cfi_def_cfa_offset 64
> sw $ra, 60($sp) # 4-byte Folded Spill
> $tmp3:
> .cfi_offset 31, -4
> addu $gp, $2, $25
> sw $7, 76($sp)
> sw $6, 72($sp)
> sw...
2013 Feb 19
0
[LLVMdev] Is va_arg correct on Mips backend?
Which part of the generated code do you think is not correct? Could you be
more specific?
I compiled this program with clang and ran it on a mips board. It returns
the expected result (21).
On Tue, Feb 19, 2013 at 4:15 AM, Jonathan <gamma_chen at yahoo.com.tw> wrote:
> I check the Mips backend for the following C code fragment compile result.
> It seems not correct. Is it my
2013 Feb 19
2
[LLVMdev] Is va_arg correct on Mips backend?
I check the Mips backend for the following C code fragment compile result. It seems not correct. Is it my misunderstand or it's a bug.
//ch8_3.cpp
#include <stdarg.h>
int sum_i(int amount, ...)
{
int i = 0;
int val = 0;
int sum = 0;
va_list vl;
va_start(vl, amount);
for (i = 0; i < amount; i++)
{
val = va_arg(vl, int);
sum += val;
}
va_end(vl);
2013 Feb 04
2
[LLVMdev] Problem with PTX assembly printing (NVPTX backend)
...target produces this:
.section .mdebug.abi32
.previous
.file "helloworld.ll"
.text
.globl main
.align 2
.type main, at function
.set nomips16 # @main
.ent main
main:
.frame $sp,24,$ra
.mask 0x80000000,-4
.fmask 0x00000000,0
.set noreorder
.set nomacro
.set noat
# BB#0:
lui $2, %hi(_gp_disp)
addiu $2, $2, %lo(_gp_disp)
addiu $sp, $sp, -24
sw $ra, 20($sp) # 4-byte Folded Spill
addu $gp, $2, $25
lw $1, %got($str)($gp)
lw $25, %call16(puts)($gp)
jalr $25
addiu $4, $1, %lo($str)
addiu $2, $zero, 0
lw $ra, 20($sp) # 4-byte Folde...
2013 Oct 03
1
[LLVMdev] Help with a Microblaze code generation problem.
...r the Mips (which
works, of course) for both unsigned long long and signed long long with
the following results:
unsigned long long:
main:
.frame $fp,24,$ra
.mask 0x40000000,-4
.fmask 0x00000000,0
.set noreorder
.set nomacro
.set noat
addiu $sp, $sp, -24
sw $fp, 20($sp)
move $fp, $sp
sw $zero, 16($fp)
addiu $1, $zero, 100
sw $1, 12($fp)
sw $zero, 8($fp)
lui $1, 32768
sw $1, 0($fp)
sw $zero, 4($fp)...
2013 Dec 21
3
[LLVMdev] running clang format on the Mips target
Hi David,
What kind of "a lot of out-of-tree changes"?
You should push changes incrementally as you do work. Holding onto changes means that many things,
not just reformatting, can make them need to be redone. We frequently clean up and rewrite
code to make it cleaner and easier to maintain.
We are moving to a more strict internal review and pushing of changes and post commit
2013 Feb 04
0
[LLVMdev] Problem with PTX assembly printing (NVPTX backend)
....type main, at function
> .set nomips16 # @main
> .ent main
> main:
> .frame $sp,24,$ra
> .mask 0x80000000,-4
> .fmask 0x00000000,0
> .set noreorder
> .set nomacro
> .set noat
> # BB#0:
> lui $2, %hi(_gp_disp)
> addiu $2, $2, %lo(_gp_disp)
> addiu $sp, $sp, -24
> sw $ra, 20($sp) # 4-byte Folded Spill
> addu $gp, $2, $25
> lw $1, %got($str)($gp)
> lw $25, %...
2018 Sep 28
3
error: expected memory with 32-bit signed offset
...------- 8< -------- 8< -------- 8< ---
I couldn't fool llvm-mc :)
test/MC/Mips/loongson3a/valid.s:32:30: error: invalid operand for
instruction
gslbx $2,0($3,$4)
^
Compare with Loongson GCC toolchain:
.text
gs:
.set noat
gslble $2, $3, $4 # encoding: [0x10,0x20,0x62,0xc8]
# <MCInst #1546 GSLBLE
# <MCOperand Reg:321>
# <MCOperand Reg:322>
...
2013 Feb 04
0
[LLVMdev] Problem with PTX assembly printing (NVPTX backend)
On Mon, Feb 4, 2013 at 1:09 PM, <nkavv at physics.auth.gr> wrote:
> Hi Justin,
>
>
> Has anyone had similar problems with the NVPTX backend? Shouldn't this
>>> code be linked to the AsmPrinter library for NVPTX (already)?
>>>
>>
>> What do you mean by "doesn't work"? The AsmPrinter library really houses
>> the MCInst
2013 Feb 04
3
[LLVMdev] Problem with PTX assembly printing (NVPTX backend)
Hi Justin,
>> Has anyone had similar problems with the NVPTX backend? Shouldn't this
>> code be linked to the AsmPrinter library for NVPTX (already)?
>
> What do you mean by "doesn't work"? The AsmPrinter library really houses
> the MCInst printer, which isn't implemented for NVPTX yet. The older
> assembly printer works just fine. This is
2013 Dec 24
2
[LLVMdev] running clang format on the Mips target
...are specific revisions that you'd like me to clean up and rebase I'd be happy to do so. In particular, we have dsub* and daddi, dli, dla, la, and .cpsetup implemented (although not the most efficient implementation of any of them, hence these patches not being ready for upstreaming), .set noat / at doing the right thing, and have fixed (I think) MIPS IV support (although not yet MIPS III, which is an oversight given that Loongson 2F is MIPS III).
> It takes time to review and respond to comments on formatting issues; time that would be better spent doing new work.
Has anyone done a...
2013 Nov 08
0
[PATCH 2/3] syscalls: Add syscalls needed by arm64
arm64 uses generic syscalls, and does not include the "noat",
"noflags", and "deprecated" syscalls.
i.e. __ARCH_WANT_SYSCALL_{NO_AT|NO_FLAGS|DEPRECATED}
This patch adds the syscalls needed for klibc to run on arm64.
Signed-off-by: Steve Capper <steve.capper at linaro.org>
---
usr/klibc/Kbuild | 3 +++
usr/klibc/SYSCA...
2013 Nov 12
0
[klibc:master] syscalls: Add syscalls needed by arm64
...Steve Capper <steve.capper at linaro.org>
AuthorDate: Mon, 11 Nov 2013 17:04:11 +0000
Committer: H. Peter Anvin <hpa at zytor.com>
CommitDate: Mon, 11 Nov 2013 19:31:13 -0800
[klibc] syscalls: Add syscalls needed by arm64
arm64 uses generic syscalls, and does not include the "noat",
"noflags", and "deprecated" syscalls.
This patch adds substitution functions for system calls not available
on arm64.
Originally-by: Neil Williams <codehelp at debian.org>
Originally-by: Anil Singhar <anil.singhar at linaro.org>
Signed-off-by: Steve Capper &...
2013 Nov 11
5
[PATCH V2 0/3] Introduce arm64 support
Hello,
Here is V2 of the arm64 support for klibc patch set.
Notable changes since the original series:
* fp regs dropped from setjmp/longjmp
* chmod, lstat and stat re-implemented with *at functions.
* open64 merged into open.
As with the original, this series is to be applied against the latest
klibc, just after
25a66fa README.klibc: update build information
V2 has been tested on x86_64
2013 Nov 08
9
[PATCH 0/3] Introduce arm64 support
Hello,
This series introduces arm64 support to klibc.
I've rebased the work from Neil Williams and Anil Singhar into the
following three patches. Most of the code changes are due to new
syscall implementations being needed for arm64 as a only a minimal set
of syscalls are defined in the arm64 kernel.
This series is to be applied against the latest klibc, just after
25a66fa README.klibc:
2006 Jul 26
5
linux-2.6-xen.hg
Hi,
Is the http://xenbits.xensource.com/linux-2.6-xen.hg tree still being
updated? if not, what''s the preferred Linux tree to track that has all
of the Xen bits?
Thanks,
Muli
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