Displaying 20 results from an estimated 65 matches for "nmis".
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2012 Nov 21
3
Reentrant NMIs, MCEs and interrupt stack tables.
Hello,
While working on a fix for the rare-but-possible problem of reentrant
NMIs and MCEs, I have discovered that it is sadly possible to generate
fake NMIs and MCEs which will run the relevant handlers on the relevant
stacks, without invoking any of the other CPU logic for these special
interrupts.
A fake NMI can be generated by a processor in PIC mode as opposed to
Virtual w...
2020 Feb 11
2
[RFC PATCH 00/62] Linux as SEV-ES Guest Support
...lstra wrote:
> Oh gawd; so instead of improving the whole NMI situation, AMD went and
> made it worse still ?!?
Well, depends on how you want to see it. Under SEV-ES an IRET will not
re-open the NMI window, but the guest has to tell the hypervisor
explicitly when it is ready to receive new NMIs via the NMI_COMPLETE
message. NMIs stay blocked even when an exception happens in the
handler, so this could also be seen as a (slight) improvement.
Regards,
Joerg
2020 Feb 11
2
[RFC PATCH 00/62] Linux as SEV-ES Guest Support
...lstra wrote:
> Oh gawd; so instead of improving the whole NMI situation, AMD went and
> made it worse still ?!?
Well, depends on how you want to see it. Under SEV-ES an IRET will not
re-open the NMI window, but the guest has to tell the hypervisor
explicitly when it is ready to receive new NMIs via the NMI_COMPLETE
message. NMIs stay blocked even when an exception happens in the
handler, so this could also be seen as a (slight) improvement.
Regards,
Joerg
2013 Jun 03
0
bce kernel page faults and NMIs (was: Strange reboot since 9.1)
...e problem?
1: http://lists.freebsd.org/pipermail/freebsd-stable/2013-March/072766.html
After disabling bce header splitting we stopped getting kernel page faults, but we still had problems with this NIC (Broadcom NetXtreme II BCM5716 Gigabit Ethernet) producing frequent PCI errors and occasional NMIs.
I found this thread[2] that suggests that the NIC firmware version may be relevant to the NMI problem. The Red Hat people are reporting that firmware version 6.0.1 is bad and 6.4.5 is good; 9.1 ships with 6.0.17, so who knows what that means... We ended up reverting to the bce driver from FreeB...
2013 Feb 14
2
Plotting survival curves after multiple imputation
..."The data must have class mids")
analyses <- as.list(1:data$m)
for (i in 1:data$m) {
data.i <- complete(data, i)
analyses[[i]] <- coxph(formula, data = data.i, ...)
}
object <- list(call = call, call1 = data$call,
nmis = data$nmis, analyses = analyses)
return(object)
}
pool.impute <- function (object, method = "smallsample") {
if ((m <- length(object$analyses)) < 2)
stop("At least two imputations are needed for pooling.\n")
analyses <- object$analyses...
2020 Feb 11
1
[PATCH 62/62] x86/sev-es: Add NMI state tracking
On Tue, Feb 11, 2020 at 5:53 AM Joerg Roedel <joro at 8bytes.org> wrote:
>
> From: Joerg Roedel <jroedel at suse.de>
>
> Keep NMI state in SEV-ES code so the kernel can re-enable NMIs for the
> vCPU when it reaches IRET.
This patch is overcomplicated IMO. Just do the magic incantation in C
from do_nmi or from here:
/*
* For ease of testing, unmask NMIs right away. Disabled by
* default because IRET is very expensive.
If you do the latter, you...
2007 May 17
1
MICE for Cox model
...(!is.mids(data))
stop("The data must have class mids")
analyses <- as.list(1:data$m)
for (i in 1:data$m) {
data.i <- complete(data, i)
analyses[[i]] <- coxph(formula, data = data.i, ...)
}
object <- list(call = call, call1 = data$call, nmis = data$nmis,
analyses = analyses)
oldClass(object) <- c("mira", "coxph")
return(object)
}
------------
The problem that I encounter occurs when I try to use the "pool"
function to pool the fitted models into one general model. Here is some
code th...
2012 Nov 22
41
[PATCH V3] vmx/nmi: Do not use self_nmi() in VMEXIT handler
The self_nmi() code cause''s an NMI to be triggered by sending an APIC
message to the local processor. However, NMIs are blocked by the
VMEXIT, until the next iret or VMENTER.
Volume 3 Chapter 27 Section 1 of the Intel SDM states:
An NMI causes subsequent NMIs to be blocked, but only after the VM exit
completes.
As a result, as soon as the VMENTER happens, an immediate VMEXIT
happens as a result of the queued...
2012 Dec 12
7
[PATCH V5] x86/kexec: Change NMI and MCE handling on kexec path
...n/arch/x86/x86_64/entry.S | 34 +++++++++++
xen/include/asm-x86/desc.h | 45 +++++++++++++++
xen/include/asm-x86/processor.h | 4 +
5 files changed, 203 insertions(+), 15 deletions(-)
Experimentally, certain crash kernels will triple fault very early after
starting if started with NMIs disabled. This was discovered when
experimenting with a debug keyhandler which deliberately created a
reentrant NMI, causing stack corruption.
Because of this discovered bug, and that the future changes to the NMI
handling will make the kexec path more fragile, take the time now to
bullet-proof t...
2013 Feb 08
3
NMI SERR interrupts in dom0
I have an Intel e1000e NIC which I put into passthrough for an HVM
domain under Xen 4.2. All the corresponding hardware protections are
enabled on my system (DMA + Interrupt remapping), however, once in a
while I get a SERR NMI in dom0 (NMI - PCI sys error (SERR) in xl dmesg).
I am wondering about its exact reason. I am thinking in the following way:
[+] Under Intel VT-x, interrupts are
2012 Mar 30
3
pooling in MICE
...ify,meanseap_1,meandep_1,meananx_1,meanper_1,meanrelma_1,meandiff_1,meanascon_1,meanclasc_1,meanschoc_1))
> grd3imp=mice(grd3dat,m=20,seed=123,print=F)
> grd3mod=with(grd3imp,lm(cbind(meanseap_1,meandep_1,meananx_1)~Boy*BVCategoryT1))
> summary(pool(grd3mod))
Error in table[, 8] <- x$nmis[names(x$qbar)] :
replacement has length zero
> pool(grd3mod)
Call: pool(object = grd3mod)
Pooled coefficients:
[1] 2.51538922 0.08041626 -0.02266421 0.33964482 -0.38691307 -0.28778570 -0.10405965 0.12206124 0.86739342 -0.17195284 0.04784570 -0.38342776
[13] -0.07785758 0.27914375...
2020 Apr 28
0
[PATCH v3 74/75] x86/sev-es: Handle NMI State
...nning under SEV-ES the kernel has to tell the hypervisor when to
open the NMI window again after an NMI was injected. This is done with
an NMI-complete message to the hypervisor.
Add code to the kernels NMI handler to send this message right at the
beginning of do_nmi(). This always allows nesting NMIs.
Signed-off-by: Joerg Roedel <jroedel at suse.de>
---
arch/x86/include/asm/sev-es.h | 2 ++
arch/x86/include/uapi/asm/svm.h | 1 +
arch/x86/kernel/nmi.c | 7 +++++++
arch/x86/kernel/sev-es.c | 18 ++++++++++++++++++
4 files changed, 28 insertions(+)
diff --git a/arch/...
2005 Jan 06
2
patterns of missing data: determining monotonicity
...monotone
missing data pattern, or, if not, what the longest monotone sequence is.
Here is an example, where in a dataset of 65 observations, there are 8
different patterns of missingness,
with X and . representing observed and missing:
Group V2 V3 V4 V5 V6 V7 V8 V9 V10 V11 nmiss
1 X X X X X X X X X X 0
2 X X X X X X . X X X 1
3 X X X X X . X X X X 1
4 X X X X X . . X X X 2
5 X X . X . X...
2007 Jun 20
9
[Patch] Add NMI Injection and Pending Support in VMX
Currently, Xen does not support injecting an NMI to HVM guest OS. Adding
this
feature is necessary for those softwares which depend on NMI to function
correctly,
such as KDB and oprofile.
The attached patch allows NMI to be injected to guest OS in NMIP capable
platforms.
It also enables to queue an NMI and then inject it as soon as possible.
Signed-off-by: Haitao Shan
2020 Feb 11
0
[PATCH 62/62] x86/sev-es: Add NMI state tracking
From: Joerg Roedel <jroedel at suse.de>
Keep NMI state in SEV-ES code so the kernel can re-enable NMIs for the
vCPU when it reaches IRET.
Signed-off-by: Joerg Roedel <jroedel at suse.de>
---
arch/x86/entry/entry_64.S | 48 +++++++++++++++++++++++++++++++++
arch/x86/include/asm/sev-es.h | 27 +++++++++++++++++++
arch/x86/include/uapi/asm/svm.h | 1 +
arch/x86/kernel/nmi.c |...
2005 Nov 09
2
error in NORM lib
...rame.Rdata")) # load object
"dframe"
dim(dframe)
apply(dframe,2,function(x) sum(is.na(x))) # check how many NAs in the
dataset
#dframe <-
subset(dframe,select=-c(alter,grpzugeh,is1,is4,is6,klassenstufe,mmit,vorai,vorap,voras,vorkf,vorsg,vorvb))
s1 <- prelim.norm(dframe)
s1$nmis # re-check of NAs should be identical to above
s2 <- prelim.norm(dframe[,1:32])# see below -> still NAs are available -
_not_ imputed
thetahat1 <- em.norm(s1)
theta1 <- da.norm(s1,thetahat1,steps=20,showits=TRUE) # error:
# Step...
2020 Feb 11
0
[RFC PATCH 00/62] Linux as SEV-ES Guest Support
...awd; so instead of improving the whole NMI situation, AMD went and
> > made it worse still ?!?
>
> Well, depends on how you want to see it. Under SEV-ES an IRET will not
> re-open the NMI window, but the guest has to tell the hypervisor
> explicitly when it is ready to receive new NMIs via the NMI_COMPLETE
> message. NMIs stay blocked even when an exception happens in the
> handler, so this could also be seen as a (slight) improvement.
>
I don't get it. VT-x has a VMCS bit "Interruptibility
state"."Blocking by NMI" that tracks the NMI masking s...
2005 Apr 11
0
RE: [PATCH] [1/3] Xenoprof: Enabling performance profiling in Xen
>>
>> Is the nmi_sanity_check() needed? We shouldn''t lose NMIs:
>> even if we take one while doing NMI processing, we sholuld
>> retake the NMI as soon as the first one IRETs.
>>
The nmi_sanity_check() should not be needed if everything is
working fine. However I suggest we should keep it for now
until we are sure it is safe to remo...
2009 Jun 04
0
Small mystery : passing a "subset=" argument to lme|lm through "..."
...if (!is.mids(data))
stop("The data must have class mids")
analyses<-lapply(1:data$m, function(i) lme(formula,
data=complete(data,i),
...))
object <- list(call = call, call1 = data$call, nmis = data$nmis,
analyses = analyses)
oldClass(object) <- c("mira", oldClass(object))
return(object)
}
> bar1<-foo(ttotal~nbpradio, data=Data1.Imp, random=~1|ctr)
> class(bar1$analyses[[1]])
[1] "lme" # Fine : the "random=" argument *HAS B...
2015 Mar 19
2
[PATCH 9/9] qspinlock, x86, kvm: Implement KVM support for paravirt qspinlock
On 03/16/2015 09:16 AM, Peter Zijlstra wrote:
> Implement the paravirt qspinlock for x86-kvm.
>
> We use the regular paravirt call patching to switch between:
>
> native_queue_spin_lock_slowpath() __pv_queue_spin_lock_slowpath()
> native_queue_spin_unlock() __pv_queue_spin_unlock()
>
> We use a callee saved call for the unlock function which reduces the
> i-cache