search for: nios2

Hi, I have completed enough of the Nios2 code generator that I think it is appropriate to bring it into the source tree. What is the best approach to take? It all sits in one directory, of course: lib/Targets/Nios2. Besides that directory, the only other change I've made is to configure. The code generator is complete, but requir...

....cpp: /// Mul/Div with two results case ISD::SMUL_LOHI: case ISD::UMUL_LOHI: { SDValue Op1 = Node->getOperand(0); SDValue Op2 = Node->getOperand(1); AddToISelQueue(Op1); AddToISelQueue(Op2); unsigned Op; Op = (Opcode == ISD::UMUL_LOHI ? Nios2::MULxu : Nios2::MULx); SDNode *Hi = CurDAG->getTargetNode(Op, MVT::Flag, Op1, Op2); SDNode *Lo = CurDAG->getTargetNode(Nios2::MUL, MVT::Flag, Op1, Op2); if (!N.getValue(0).use_empty()) ReplaceUses(N.getValue(0), SDValue(Lo,0)); if (!N.getValue(1).use_empty...

We (Intel) would like to propose removal of the Nios2 backend from the repository. It is currently considered an experimental target. The implementation is not complete and months went by without anyone noticing it doesn't build. See https://reviews.llvm.org/D56178 Due to internal priority changes, it doesn't look like it will become more ma...

Saw this mentioned on Lambda, and thought it was worth pointing out (though I'm betting most of you are Lambda readers). Looks like it's a new approach to mapping out optimizations and picking the best ordering/grouping. http://www.cse.ucsd.edu/~rtate/publications/eqsat/ Just watched the video and am settling down to read the paper, and it looks interesting so far. Anyone more

...rote: > Patches up > > Clang: https://reviews.llvm.org/D56690 > LLVM: https://reviews.llvm.org/D56691 > > ~Craig > > > On Mon, Jan 14, 2019 at 3:51 PM Craig Topper <craig.topper at gmail.com> > wrote: > >> We (Intel) would like to propose removal of the Nios2 backend from the >> repository. >> >> It is currently considered an experimental target. The implementation is >> not complete and months went by without anyone noticing it doesn't build. >> See https://reviews.llvm.org/D56178 >> >> Due to internal prio...

...>>> LLVM: https://reviews.llvm.org/D56691 >>> >>> ~Craig >>> >>> >>> On Mon, Jan 14, 2019 at 3:51 PM Craig Topper <craig.topper at gmail.com> >>> wrote: >>> >>>> We (Intel) would like to propose removal of the Nios2 backend from the >>>> repository. >>>> >>>> It is currently considered an experimental target. The implementation >>>> is not complete and months went by without anyone noticing it doesn't >>>> build. See https://reviews.llvm.org/D5617...

...general-purpose RISC processor core designed specifically for the Altera family of FPGAs. All information at about Nios II can be found at Altera website https://www.altera.com/products/processors/support.html, including the current ISA specification https://www.altera.com/en_US/pdfs/literature/hb/nios2/n2cpu-nii5v1gen2.pdf Nios II has two different binary incompatible ISA, that is called R1 and R2. I'm going to support both of them. Nios II code generation for both ISA already is supported by GNU compiler. GNU compiler also supports big-endian mode of code generation that is not a high prio...

On Thu, Sep 11, 2008 at 4:31 PM, Arnold Schwaighofer <arnold.schwaighofer at gmail.com> wrote: > Tail calls through function pointers should work.If not please send a testcase. > > I just added the two examples from the bug (1392) that calls for true > tail call support. They work on my machine (-tailcallopt needs to be > enabled) ;) > > That would be commit 56127. >

.... Since I only have a few weeks invested in this project, I won't feel too bad if Elsa turns out to be a dead end. Along the way I found LLVM, which is definitely the way to go. I'd like to get the Elsa stuff behind me because I'm itching to do an LLVM code generator for the Altera Nios2. ;-) I started by copying the MIPS sources and am studying them to get a feel for what's required. -Rich

Tail calls through function pointers should work.If not please send a testcase. I just added the two examples from the bug (1392) that calls for true tail call support. They work on my machine (-tailcallopt needs to be enabled) ;) That would be commit 56127. regards On Thu, Sep 11, 2008 at 11:21 PM, Evan Cheng <evan.cheng at apple.com> wrote: > Arnold implemented tail call. We

...uetooth-btmtk.c:error:struct-hci_dev-has-no-member-named-dump |-- m68k-randconfig-r016-20230704 | `-- drivers-bluetooth-btmtk.c:error:struct-hci_dev-has-no-member-named-dump |-- microblaze-randconfig-r073-20230703 | `-- drivers-bluetooth-btmtk.c:error:struct-hci_dev-has-no-member-named-dump |-- nios2-randconfig-r034-20230704 | `-- drivers-bluetooth-btmtk.c:error:struct-hci_dev-has-no-member-named-dump |-- riscv-randconfig-m031-20230703 | |-- drivers-vhost-vhost.c-vhost_vring_ioctl()-error:uninitialized-symbol-idx-. | |-- drivers-vhost-vhost.c-vhost_vring_ioctl()-error:uninitialized-symbol...

...Ok. For most users to be interested in it, it would have to be faster or produce better code, and be as correct as G++. I'll be interested to see how it comes out. > I'd like to get the Elsa stuff behind me because I'm itching to do an > LLVM code generator for the Altera Nios2. ;-) I started by copying the > MIPS sources and am studying them to get a feel for what's required. Ah, nifty. I no nothing of that processor, but you can build a backend independent of the front-end :) -Chris

...d on 2.18.50) and gdb/insight (based on 6.8) to handle all the LLVM targets (except PIC, see below). The nice thing about gdb 6.8 is that one binary can deal with multiple (remote) targets. I've configured and built this package for the following targets: alpha-elf arm-elf spu-elf ia64-elf nios2-elf mips-elf powerpc-elf powerpc64-elf sparc-elf x86-elf x86_64-elf x86-pe The nios2 support was added from the Altera port. I'm working on a Nios2 code generator for LLVM. This package builds one assembler for each target, one gdb/insight for all, one linker for all, and the other binutils...

...I only have a few weeks invested in this project, I won't feel too > bad if Elsa turns out to be a dead end. Would you mind explaining what a dead-end would look like? > I'd like to get the Elsa stuff behind me because I'm itching to do an > LLVM code generator for the Altera Nios2. ;-) I started by copying the > MIPS sources and am studying them to get a feel for what's required. In other words you want a C++ compiler for the Nois2? Daniel

...output-may-be-truncated-writing-between-and-bytes-into-a-region-of-size | `-- drivers-regulator-rtq2208-regulator.c:warning:rtq2208_regulator_ldo_ops-defined-but-not-used |-- mips-allyesconfig | `-- drivers-regulator-rtq2208-regulator.c:warning:rtq2208_regulator_ldo_ops-defined-but-not-used |-- nios2-allmodconfig | `-- drivers-regulator-rtq2208-regulator.c:warning:rtq2208_regulator_ldo_ops-defined-but-not-used |-- nios2-allyesconfig | `-- drivers-regulator-rtq2208-regulator.c:warning:rtq2208_regulator_ldo_ops-defined-but-not-used |-- nios2-randconfig-001-20240529 | `-- drivers-regulator-r...

...dconfig-r002-20230731 gcc microblaze randconfig-r023-20230731 gcc mips allmodconfig gcc mips allyesconfig gcc mips maltaaprp_defconfig clang mips sb1250_swarm_defconfig clang nios2 defconfig gcc nios2 randconfig-r024-20230731 gcc nios2 randconfig-r035-20230731 gcc nios2 randconfig-r036-20230731 gcc parisc allyesconfig gcc parisc...

...IPS_26-against-kernel_entry | |-- drivers-gpu-drm-nouveau-nvkm-subdev-gsp-r535.c:warning:Function-parameter-or-struct-member-gsp-not-described-in-nvkm_gsp_radix3_sg | `-- fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead |-- nios2-allmodconfig | `-- fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead |-- nios2-allyesconfig | `-- fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead |-- o...

...| 1 - arch/m32r/include/asm/processor.h | 1 - arch/m68k/include/asm/processor.h | 1 - arch/metag/include/asm/processor.h | 1 - arch/microblaze/include/asm/processor.h | 1 - arch/mips/include/asm/processor.h | 1 - arch/mn10300/include/asm/processor.h | 1 - arch/nios2/include/asm/processor.h | 1 - arch/openrisc/include/asm/processor.h | 1 - arch/parisc/include/asm/processor.h | 1 - arch/powerpc/include/asm/processor.h | 2 -- arch/s390/include/asm/processor.h | 1 + arch/score/include/asm/processor.h | 1 - arch/sh/include/asm/process...

...| 1 - arch/m32r/include/asm/processor.h | 1 - arch/m68k/include/asm/processor.h | 1 - arch/metag/include/asm/processor.h | 1 - arch/microblaze/include/asm/processor.h | 1 - arch/mips/include/asm/processor.h | 1 - arch/mn10300/include/asm/processor.h | 1 - arch/nios2/include/asm/processor.h | 1 - arch/openrisc/include/asm/processor.h | 1 - arch/parisc/include/asm/processor.h | 1 - arch/powerpc/include/asm/processor.h | 2 -- arch/s390/include/asm/processor.h | 1 + arch/score/include/asm/processor.h | 1 - arch/sh/include/asm/process...

Hi All, WebAssembly has been around for a while now, it's still being actively worked on and used. I think it's long past time we make it a normal target so that it gets tested on a regular basis. (Most recent random breakage is https://reviews.llvm.org/rL342576 which fails make check with web assembly enabled). Any objections? I'll probably do this next week unless someone raises a