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...e effort was mainly to get it to work acceptably, with > the real performance tuning work being done for Thumb2. I'm not > surprised that an embedded market focussed compiler like IAR is better > tuned for a chip like that. > > -Jim > > On Feb 26, 2013, at 2:11 PM, matic at nimp.co.uk <mailto:matic at nimp.co.uk> > wrote: > >> Hi, >> >> >> I didn't do any serious benchmarking but so far I never found a case >> where LLVM does better than IAR on CortexM0, but I saw a lot of cases >> where IAR output is better than LLVM......

...to work acceptably, with >> the real performance tuning work being done for Thumb2. I'm not >> surprised that an embedded market focussed compiler like IAR is better >> tuned for a chip like that. >> >> -Jim >> >> On Feb 26, 2013, at 2:11 PM, matic at nimp.co.uk <mailto:matic at nimp.co.uk> >> wrote: >> >>> Hi, >>> >>> >>> I didn't do any serious benchmarking but so far I never found a case >>> where LLVM does better than IAR on CortexM0, but I saw a lot of cases >>> where...

.... Even back then (2008 or so), the effort was mainly to get it to work acceptably, with the real performance tuning work being done for Thumb2. I'm not surprised that an embedded market focussed compiler like IAR is better tuned for a chip like that. -Jim On Feb 26, 2013, at 2:11 PM, matic at nimp.co.uk wrote: > Hi, > > > I didn't do any serious benchmarking but so far I never found a case where LLVM does better than IAR on CortexM0, but I saw a lot of cases where IAR output is better than LLVM... > > That said I did not use -Os or -Oz, I just used -O3. > > A...

...es generate slightly better code, but it still computes 7 xor + 7 and. Anyway this should be a target independent optimization isn't it ?? Cheers Sebastien On 2013-02-04 16:46, Bill Wendling wrote: > Have you tried armv7? > > -bw > > On Feb 2, 2013, at 3:50 PM, matic at nimp.co.ukwrote: > >> I gave the following function to IAR compiler (targeting CortexM0) and to clang/LLVM 3.2 (clang -O3 -target thumbv6-eabi -emit-llvm) int calleeSave8(int in[]){ int out=0; int i; for(i=0;i<8;i++){ out ^= in[i] & in[(i+1)%8]; }//expand to out = (in[0]&in[1])^(in[...

Hi, I didn't do any serious benchmarking but so far I never found a case where LLVM does better than IAR on CortexM0, but I saw a lot of cases where IAR output is better than LLVM... That said I did not use -Os or -Oz, I just used -O3. A recurrent situation is that LLVM push/pop one or two extra registers compared to IAR, I guess it does so in order to comply with a standard ABI or

...e effort was mainly to get it to work acceptably, with > the real performance tuning work being done for Thumb2. I'm not > surprised that an embedded market focussed compiler like IAR is better > tuned for a chip like that. > > -Jim > > On Feb 26, 2013, at 2:11 PM, matic at nimp.co.uk <mailto:matic at nimp.co.uk<matic at nimp.co.uk> > > > wrote: > > Hi, > > > I didn't do any serious benchmarking but so far I never found a case > where LLVM does better than IAR on CortexM0, but I saw a lot of cases > where IAR output is better than...

Have you tried armv7? -bw On Feb 2, 2013, at 3:50 PM, matic at nimp.co.uk wrote: > I gave the following function to IAR compiler (targeting CortexM0) and to clang/LLVM 3.2 (clang -O3 -target thumbv6-eabi -emit-llvm) > > int calleeSave8(int in[]){ > int out=0; > int i; > for(i=0;i<8;i++){ > out ^= in[i] & in[(i+1)%8]...

Hi, I would like to execute a MachineFunctionPass after all other passes which modify the machine code. In other words, if we call llc to generate assembly file, that pass should run right before the "Assembly Printer" pass. Is there any official way to enforce this ? Best regards, Sebastien

I gave the following function to IAR compiler (targeting CortexM0) and to clang/LLVM 3.2 (clang -O3 -target thumbv6-eabi -emit-llvm) int calleeSave8(int in[]){ int out=0; int i; for(i=0;i<8;i++){ out ^= in[i] & in[(i+1)%8]; }//expand to out = (in[0]&in[1])^(in[1]&in[2])^(in[2]&in[3])^(in[3]&in[4])^(in[4]&in[5])^(in[5]&in[6])^(in[6]&in[7])^(in[7]&in[0])

Hi, I am confused about the call to isPhyRegUsed in calculateCalleeSavedRegisters: if (Fn.getRegInfo().isPhysRegUsed(Reg)) { // If the reg is modified, save it! CSI.push_back(CalleeSavedInfo(Reg)); } It seems that isPhyRegUsed returns true if the register is read or written in the function. If this is right, why do we save a register if it is only read in the function ?? I would have

On Jan 21, 2014, at 3:20 PM, Andrew Trick <atrick at apple.com> wrote: > > On Jan 21, 2014, at 2:20 PM, sebastien riou <matic at nimp.co.uk> wrote: > >> Hi, >> >> I would like to execute a MachineFunctionPass after all other passes >> which modify the machine code. >> In other words, if we call llc to generate assembly file, that pass >> should run right before the "Assembly Printe...

Hi, I got that message from a call to InstrEmitter::AddOperand. I am writing a back end for CortexM0 (for self teaching purposes), I am working on LDR with immediate offset instruction. In the ARM backend, if the offset is 0, the following code is executed by the function ARMDAGToDAGISel::SelectThumbAddrModeImm5S Base = N.getOperand(0); OffImm = CurDAG->getTargetConstant(0, MVT::i32);

Hi, > I wonder if there would be any interest in an annual (or some > reasonable interval) "workshop" sort of thing that teaches backend > development. That may be a better learning medium for this material > than a book. > > -- Sean Silva --> I would join right away! I am making a backend for CortexM0 to learn this black art. Even though the ARM backend is here