search for: nicolai

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2020 Mar 13
3
Why MachineBasicBlcok doesn't have transferPredecessors() ?
for example I want to insert a new machine bb “before” a specific machine bb. or split a mbb and keep the later one as the original one. (to keep the label/Blackadder's correct t) (or keep other property of mbb) so I need to transfer the original mbb's predecessor to the new mbb. Nicolai Hähnle <nhaehnle at gmail.com> 於 2020年3月13日 週五 23:57 寫道: > On Fri, Mar 13, 2020 at 12:22 PM PenYiWang via llvm-dev > <llvm-dev at lists.llvm.org> wrote: > > I found that there is transferSuccessors() in MachineBasicBlcok > > > > So that when manipulating Machine...
2016 Jan 07
2
llvm-config with shared libraries in cmake builds broken (since r257003?)
...o is missing Looking at the log, this is most likely caused by your recent change. cmake shared library builds generate separate .so files analogous to the static library builds, e.g. libLLVMCodeGen.so (no version suffix, curiously enough). It would be nice if that wasn't broken :) Cheers, Nicolai
2020 Aug 04
2
TableGen trace facility
...icized. It also appears to be the case that a record is created and bound to its name before fields are inherited from its superclasses, which is why you can write: class A <dag d> { dag the_dag = d; } def rec1 : A<(ops rec1)> Do I understand that correctly? At 8/4/2020 05:38 PM, Nicolai Hähnle wrote: >On Tue, Aug 4, 2020 at 11:13 PM Paul C. Anagnostopoulos ><paul at windfall.com> wrote: >> Yes, I understand the problem. To be more useful, TableGen would have to carry the traces along with the classes and records and (re)display the values while the substitutions...
2020 Oct 07
2
New TableGen backend for debugging
I certainly agree that there are a boatload of CMake options. I haven't even scratched the surface. In keeping with your suggestion: Is there a way to tell Ninja to build just one target machine? At 10/7/2020 02:58 PM, Nicolai Hähnle wrote: >Hi Paul, > >On Wed, Oct 7, 2020 at 3:33 PM Paul C. Anagnostopoulos via llvm-dev ><llvm-dev at lists.llvm.org> wrote: >> I'm glad you find it useful. I haven't thought about it being done as part of the build, nor am I any sort of build guru. What do o...
2020 Jun 29
5
Heads-up: Handling target-specific intrinsics in InstCombine
...eally is target-specific. What the aforementioned change does is provide a target hook via TargetTransformInfo, and move the handling of all target intrinsics for InstCombine purposes into the corresponding lib/Target/$foo/ directory via the hook, thus cleaning up the core of InstCombine. Cheers, Nicolai -- Lerne, wie die Welt wirklich ist, aber vergiss niemals, wie sie sein sollte.
2019 Jun 06
3
[RFC] Expressing preserved-relations between passes from different modules (was: Re: Linker issue)
...wouldn't work anyway because DLL loading on Windows can't do the required commoning. So the general approach taken in https://reviews.llvm.org/D62802 seems to be the only technically viable path forward, though it would still be good to get an outside look at the concrete details. Thanks, Nicolai On Mon, Jun 3, 2019 at 10:35 AM Nicolai Hähnle-Montoro <nhaehnle at gmail.com> wrote: > > Hi all, > > re-upping and renaming this thread to get some attention, as we'd like > some feedback on a change that affects the future design direction. > > The concrete problem...
2005 Dec 28
3
Handcar on Rails
...kind of on- and offline (!) documentations. They contain a nearly complete reference and some tutorials. Is anyone interested in helping me to build something similar for Rails? I just have some ideas (like the name and the domain: handcar.de), so any help will be appreciated. With kind regards Nicolai Reuschling __ [1] http://selfhtml.org/ [2] http://www.selfphp.de/
2020 Feb 05
2
Eliminate some two entry PHI nodes - SimplifyCFG
Conditional on the target supporting cmov? Though that's probably not optimal. On Wed, Feb 5, 2020, 7:47 AM Nicolai Hähnle <nhaehnle at gmail.com> wrote: > Hi Ryan, > > On Mon, Feb 3, 2020 at 7:08 PM Ryan Taylor via llvm-dev > <llvm-dev at lists.llvm.org> wrote: > > SimplifyCFG FoldTwoEntryPhiNode looks to simplify all 2 entry phi nodes > in a block, if it can't do them all...
2020 Oct 13
5
Manipulating DAGs in TableGen
...t dag even if there is mismatch between signedness of types. All of these sound like operations that are specific to TableGen backend interpretations of what a DAG means. This discussion is about !ops which are a part of the TableGen frontend, so I don't think any of these apply here. Cheers, Nicolai > > > > On Mon, Oct 12, 2020 at 11:31 PM Paul C. Anagnostopoulos via llvm-dev <llvm-dev at lists.llvm.org> wrote: >> >> I understood that the name is a matching tag for the operand and not its name (as in named macro or function arguments). However, I was assuming...
2018 Aug 22
4
Condition code in DAGCombiner::visitFADDForFMACombine?
...long the lines of (in LangRef): ``contract`` Allow floating-point contraction (e.g. fusing a multiply followed by an addition into a fused multiply-and-add). This flag must be present on all affected instruction. And we should probably say the same about ``reassoc`` as well. Cheers, Nicolai > > On Wed, Aug 22, 2018 at 3:55 AM Nicolai Hähnle via llvm-dev > <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> wrote: > > On 21.08.2018 16:08, Ryan Taylor via llvm-dev wrote: > > So I have a test case where: > > >...
2020 Aug 04
2
Discourse category for the AMDGPU target
...at one isn't subscribed to. 2.2. We believe that maintaining a new mailing list is a higher burden for the LLVM project (I'm happy to be corrected on that point). Are you saying that you think we should use one of those alternatives, or do you have yet another alternative in mind? Cheers, Nicolai > > On Mon, Jul 27, 2020 at 9:36 AM Nicolai Hähnle via llvm-dev > <llvm-dev at lists.llvm.org> wrote: > > > > Hi all, > > > > We’ve been having discussions over the last few weeks with > > stakeholders both inside and outside of AMD about where we coul...
2019 Nov 25
2
[Machine IR] Analyzing Assembly Source Code in MIR passes
Llvm-mctoll will raise a binary back to LLVM IR. Not exactly what you want but it might be something you can leverage. https://github.com/microsoft/llvm-mctoll On Mon, Nov 25, 2019 at 1:19 PM Nicolai Hähnle via llvm-dev < llvm-dev at lists.llvm.org> wrote: > On Thu, Nov 21, 2019 at 3:37 AM Lele Ma via llvm-dev > <llvm-dev at lists.llvm.org> wrote: > > My goal is to write LLVM Machine IR (MIR) passes to analyze the assembly > source code. But it seems I need to find a...
2016 Oct 24
2
RFC: (Co-)Convergent functions and uniform function parameters
On 24.10.2016 21:54, Mehdi Amini wrote: >> On Oct 24, 2016, at 12:38 PM, Nicolai Hähnle via llvm-dev <llvm-dev at lists.llvm.org> wrote: >> Some brain-storming on an issue with SPMD/SIMT backend support where I think some additional IR attributes would be useful. Sorry for the somewhat long mail; the short version of my current thinking is that I would like to have...
2018 Aug 22
2
Condition code in DAGCombiner::visitFADDForFMACombine?
...t; This is probably going to effect on other backends and break llvm-lit > for them? Very likely, yes. Can you take a look at how big the fallout is? This might give us a hint about what other frontends might expect, and who needs to be involved in the discussion (if one is needed). Cheers, Nicolai > > On Wed, Aug 22, 2018 at 11:41 AM Nicolai Hähnle <nhaehnle at gmail.com > <mailto:nhaehnle at gmail.com>> wrote: > > On 22.08.2018 13:29, Ryan Taylor wrote: > > The example starts as SPIR-V with the NoContraction decoration > flag on >...
2016 May 09
2
Removing pointers from MCInstrDesc for less relocations
On 09.05.2016 05:19, Benjamin Kramer wrote: > On Mon, May 9, 2016 at 5:35 AM, Nicolai Hähnle <llvm-dev at lists.llvm.org> wrote: >> Hi everybody, >> >> I noticed today that my libLLVM-3.9svn.so has a ~1.7MB .data.rel.ro segment >> - i.e. data that needs to be touched by the dynamic linker even though it's >> ultimately read-only, and data that...
2010 Jul 20
1
nss_pam against centos-ds fails for non-root users
...ant to use nss_ldap (version 253) against a centos directory server (version 8.1.0) running on the same host. The great mystery is, that as root everything works find, but as any other local user, it does not: root$ getent passwd [...] ldap:x:55:55:LDAP User:/var/lib/ldap:/bin/false ns:*:4000:4000:Nicolai Stange:/home/ns:/bin/bash root$ su some_local_user - some_local_user$ getent passwd [...] ldap:x:55:55:LDAP User:/var/lib/ldap:/bin/false some_local_user$ It just hangs for a while after printing the local user 'ldap' on the screen and then exits without displaying the ldap-user 'ns...
2018 Nov 09
2
[RFC] Tablegen-erated GlobalISel Combine Rules
....org> writes: > > > I've been working on the GlobalISel combiner recently and I'd like to > > share the plan for how Combine Rules will be defined in GlobalISel and > > solicit feedback on it. > > This is really great stuff! I agree with pretty much everything Nicolai > said, particularly the use of DAGs. That's seems much more natually > TableGen-y to me. Specific comments are below. > > But before that, I've been long pained that we have so much duplicated > code in instcombine and dagcombine. I know this is way beyond the scope >...
2018 Nov 22
2
Question on fast-math optimizations
On 11/21/18 12:41 PM, Nicolai Hähnle wrote: > On 20.11.18 16:38, Stephen Canon via llvm-dev wrote: >> Distribution doesn’t seem to be used by many transforms at present. >> My vague recollection is that the fast math flags didn’t do a great >> job of characterizing when it would be allowed, and using it...
2020 Aug 04
3
TableGen trace facility
...values while the substitutions are being made. I'm writing a new Programmer's Guide for TableGen and have been digging into the parse-time versus substitution-time issue. I haven't found a document that makes it clear. Can you give a quick summary of the phases? At 8/4/2020 05:01 PM, Nicolai Hähnle wrote: >On Mon, Aug 3, 2020 at 6:04 PM Paul C. Anagnostopoulos via llvm-dev ><llvm-dev at lists.llvm.org> wrote: >> A question for those of you who have developed complex TableGen files: Do you think a trace facility would be useful during debugging? The idea is to add a n...
2019 Nov 27
2
Writing a Pass in LLVM MC (Machine Code) level to Analyze Assembly Code
...frastructure (such as FunctionPass at IR level; MachineFunctionPass at MIR pass). Could anyone direct me where I should start to write a MC level pass? Best Regards, Lele On Mon, Nov 25, 2019 at 5:24 PM Lele Ma <lelema.cn at gmail.com> wrote: > Thank you for the instructions, Aaron and Nicolai! > > Raising a binary to LLVM IR, or raising to MIR is a reasonable solution > for me. However, given Nicolai's information that not all target-specific > instructions are representable in MIR, I got two questions that need your > help: > > 1. Why MIR does not necessarily r...