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...es' > make: *** [all] Error 1 > can anyone tell me where is wrong . > All of my tool version are meeting the requestion. > > > > > > > =============================================== > 快来和我一起享受TOM免费邮箱吧！ 看看除了1.5G，还有什么？ > <http://bjcgi.163.net/cgi-bin/newreg.cgi? rf=050602> > > 共同体验超大容量！超强防御！专业杀毒！专业防垃圾！ > <http://bjcgi.163.net/cgi-bin/newreg.cgi? rf=050602> > > 明星送祝福(http://sr.tom.com)： 周杰伦 > <http://sr.tom.com/send.php?id=330&type=2> 蔡依林 > <http://sr.tom.com/send.php?id=315&type=2> 王力宏 > &lt...

Hello~~~ I need to use some functions provided by xen, such as xc_vcpu_getcontext(), xc_map_foreign_ranger() and so on. I have find them in the /libxc/xc_domain.c~~~ But I don't know how to use them in my program. For example, if I need to use the function named printf(), I have to include the header file <stdio.h>~~~ Now, I want to use these functions provided by xen, which header

...But of course then other tests fail. For example: build-all/./bin/llc < test/CodeGen/R600/literals.ll -march=r600 -mcpu=redwood gives llc: ../lib/CodeGen/TwoAddressInstructionPass.cpp:684: void (anonymous namespace)::TwoAddressInstructionPass::scanUses(unsigned int): Assertion `SrcRegMap[NewReg] == Reg && "Can't map to two src registers!"' failed. So I suppose there are assumptions that defusechain_instr_iterator ignores implicit sub register use when defining some sub register. :/ What's your thoughts on this? Thanks, Mikael

Hello~~~~ I have to use some special functions provided by xen, such as xc_vcpu_getcontext(),xc_map_foreign_range() and so on. I tried to find them in the Xen Interface Manuel, but failed. Does anyone know where they are? And another problem: In the Xen Interface Manuel(Appendix A), "xen/include/public/" has been mentioned many times.But I havn't found such a directory in my

Hi, I’m looking at RegBankSelect’s partially implemented support for deciding to split a value between multiple registers and I’m wondering if it’s actually intended to solve the problem I’m trying to use it for. RegisterBankInfo.h has this example mapping table: /// E.g., /// Let say we have a 32-bit add and a <2 x 32-bit> vadd. We /// can expand the /// <2 x 32-bit> add into

Hi Quentin, On 08/15/14 19:01, Quentin Colombet wrote: [...] >> The question is: How should true subregister definitions be >> expressed so that they do not interfere with each other? See the >> detailed problem description below. > > We do have a limitation in our current liveness tracking for > sub-register. Therefore, I am not sure that is possible. > >

..." >> #include "llvm/ADT/STLExtras.h" >> #include "llvm/ADT/SmallVector.h" >> #include "llvm/CodeGen/DFAPacketizer.h" >> @@ -466,7 +466,862 @@ unsigned HexagonInstrInfo::createVR(MachineFunction* MF, MVT VT) const { >> return NewReg; >> } >> >> +bool HexagonInstrInfo::isExtendable(const MachineInstr *MI) const { >> + switch(MI->getOpcode()) { >> + // JMP_EQri >> + case Hexagon::JMP_EQriPt_nv_V4: >> + case Hexagon::JMP_EQriPnt_nv_V4: >> + case Hexagon::JMP_EQriNo...