Displaying 20 results from an estimated 85 matches for "new_val".
2011 Apr 24
0
SNMP issues since 5.6 upgrade
...re
yet...
[root at mail1 paul]# uname -a
Linux mail1.xxxxxx.xxx 2.6.18-238.9.1.el5PAE #1 SMP Tue Apr 12 18:52:55 EDT
2011 i686 i686 i386 GNU/Linux
[root at mail1 paul]# cat /etc/issue
CentOS release 5.6 (Final)
Kernel \r on an \m
Apr 24 10:26:24 mail1 snmpd[3493]: netsnmp_assert 1 == new_val->high failed
int64.c:419 netsnmp_c64_check32_and_update()
Apr 24 10:26:24 mail1 snmpd[3493]: netsnmp_assert 1 == new_val->high failed
int64.c:419 netsnmp_c64_check32_and_update()
Apr 24 10:26:54 mail1 snmpd[3493]: c64 32 bit check failed
Apr 24 10:26:54 mail1 snmpd[3493]: netsnmp_assert 1...
2015 Nov 12
0
[PATCH] VMCI: Use 32bit atomics for queue headers on X86_32
...of a head or tail pointer. For X86_32, the
+ * pointer is treated as a 32bit value, since the pointer value
+ * never exceeds a 32bit value in this case. On 32bit SMP, using a
+ * locked cmpxchg8b adds unnecessary overhead.
+ */
+static inline void vmci_q_set_pointer(atomic64_t *var,
+ u64 new_val)
+{
+#if defined(CONFIG_X86_32)
+ return atomic_set((atomic_t *)var, (u32)new_val);
+#else
+ return atomic64_set(var, new_val);
+#endif
+}
+
+/*
* Helper to add a given offset to a head or tail pointer. Wraps the
* value of the pointer around the max size of the queue.
*/
@@ -741,14 +776,14 @...
2015 Nov 12
0
[PATCH] VMCI: Use 32bit atomics for queue headers on X86_32
...of a head or tail pointer. For X86_32, the
+ * pointer is treated as a 32bit value, since the pointer value
+ * never exceeds a 32bit value in this case. On 32bit SMP, using a
+ * locked cmpxchg8b adds unnecessary overhead.
+ */
+static inline void vmci_q_set_pointer(atomic64_t *var,
+ u64 new_val)
+{
+#if defined(CONFIG_X86_32)
+ return atomic_set((atomic_t *)var, (u32)new_val);
+#else
+ return atomic64_set(var, new_val);
+#endif
+}
+
+/*
* Helper to add a given offset to a head or tail pointer. Wraps the
* value of the pointer around the max size of the queue.
*/
@@ -741,14 +776,14 @...
2008 Nov 07
0
[PATCH][cfq-cgroups] Introduce ioprio class for top layer.
...D_FUNCTION
+
+#define WRITE_FUNCTION(__FUNC, __VAR, MIN, MAX) \
+static ssize_t __FUNC(struct cgroup *cont, struct cftype *cft, \
+ struct file *file, const char __user *userbuf, \
+ size_t nbytes, loff_t *ppos) \
+{ \
+ struct cfq_cgroup *cfqc; \
+ ssize_t ret; \
+ long new_val; \
+ int err, sn; \
+ char *buffer = NULL; \
+ char *valbuf = NULL, *pathbuf = NULL; \
+ struct rb_node *p; \
+ \
+ cgroup_lock(); \
+ if (cgroup_is_removed(cont)) { \
+ cgroup_unlock(); \
+ ret = -ENODEV; \
+ goto out; \
+ } \
+...
2008 Nov 07
0
[PATCH][cfq-cgroups] Introduce ioprio class for top layer.
...D_FUNCTION
+
+#define WRITE_FUNCTION(__FUNC, __VAR, MIN, MAX) \
+static ssize_t __FUNC(struct cgroup *cont, struct cftype *cft, \
+ struct file *file, const char __user *userbuf, \
+ size_t nbytes, loff_t *ppos) \
+{ \
+ struct cfq_cgroup *cfqc; \
+ ssize_t ret; \
+ long new_val; \
+ int err, sn; \
+ char *buffer = NULL; \
+ char *valbuf = NULL, *pathbuf = NULL; \
+ struct rb_node *p; \
+ \
+ cgroup_lock(); \
+ if (cgroup_is_removed(cont)) { \
+ cgroup_unlock(); \
+ ret = -ENODEV; \
+ goto out; \
+ } \
+...
2013 Nov 05
2
[LLVMdev] Identifying the instructions that uses a pointer used as a function argument
...ointer but it is giving me only one use.
(the call instruction to myFunc())
Is it happening because val is a pointer and the value is stored into
register first? How can I identify the uses of val in the IR? (And
if again val is assigned to a new pointer, the uses of that new
pointer? e.g int * new_val = val; all the uses of new_val)
**I don't know if this is the right path to go, but if I could get the
name of the pointer used as an function argument, I could match the
name against other instructions that use the same named pointer. But
this is also not working because first the pointer is...
2019 Aug 09
0
[RFC PATCH v6 55/92] kvm: introspection: add KVMI_CONTROL_MSR and KVMI_EVENT_MSR
...zero
+* -KVM_EAGAIN - the selected vCPU can't be introspected yet
+
Events
======
@@ -1308,3 +1347,37 @@ register (see **KVMI_CONTROL_EVENTS**).
``kvmi_event``, the control register number, the old value and the new value
are sent to the introspector. The *CONTINUE* action will set the ``new_val``.
+7. KVMI_EVENT_MSR
+-----------------
+
+:Architectures: x86
+:Versions: >= 1
+:Actions: CONTINUE, CRASH
+:Parameters:
+
+::
+
+ struct kvmi_event;
+ struct kvmi_event_msr {
+ __u32 msr;
+ __u32 padding;
+ __u64 old_value;
+ __u64 new_value;
+ };
+
+:Returns:
+
+::
+
+ struct kvmi_vcpu_...
2005 Dec 07
5
[PATCH] Arch-neutral balloon driver
....6-xen-sparse/include/asm-xen/asm-ia64/hypercall.h Sun Dec
4 19:12:00 2005
+++ b/linux-2.6-xen-sparse/include/asm-xen/asm-ia64/hypercall.h Tue Dec
6 16:25:53 2005
@@ -355,34 +355,27 @@
#endif
return 1;
}
+#endif
static inline int
HYPERVISOR_update_va_mapping(
unsigned long va, pte_t new_val, unsigned long flags)
{
-#if 0
- int ret;
- unsigned long ign1, ign2, ign3;
-
- __asm__ __volatile__ (
- TRAP_INSTR
- : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3)
- : "0" (__HYPERVISOR_update_va_mapping),
- &...
2013 Nov 05
0
[LLVMdev] Identifying the instructions that uses a pointer used as a function argument
...ly one use.
> (the call instruction to myFunc())
>
> Is it happening because val is a pointer and the value is stored into
> register first? How can I identify the uses of val in the IR? (And
> if again val is assigned to a new pointer, the uses of that new
> pointer? e.g int * new_val = val; all the uses of new_val)
>
> **I don't know if this is the right path to go, but if I could get the
> name of the pointer used as an function argument, I could match the
> name against other instructions that use the same named pointer. But
> this is also not working beca...
2003 Dec 14
1
compile error with C code and standalone R math C library
...***********
#include <stdio.h>
#include <assert.h>
#define T 3
#define INITVAL 1
#define MATHLIB_STANDALONE
#define THETA 2
#include <Rmath.h>
#include <time.h>
void advance(double *node, int *current_pos, double newval);
void retreat(double *node, int *current_pos);
double new_val(double *node, double theta, int current_pos);
double accept_prob(double *node, double theta, int current_pos);
double accept_prob_fn(double a, double y);
int main()
{
int currentpos = 0;
int i;
double newval, node[T+2], theta = THETA, p, u;
set_seed(time(NULL), clock());
node[0]=0;
fo...
2013 Nov 05
1
[LLVMdev] Identifying the instructions that uses a pointer used as a function argument
...e call instruction to myFunc())
>>
>> Is it happening because val is a pointer and the value is stored into
>> register first? How can I identify the uses of val in the IR? (And
>> if again val is assigned to a new pointer, the uses of that new
>> pointer? e.g int * new_val = val; all the uses of new_val)
>>
>> **I don't know if this is the right path to go, but if I could get the
>> name of the pointer used as an function argument, I could match the
>> name against other instructions that use the same named pointer. But
>> this is a...
2020 Feb 07
0
[RFC PATCH v7 69/78] KVM: introspection: add KVMI_VCPU_CONTROL_MSR and KVMI_EVENT_MSR
...``write`` is 1 if the descriptor was written, 0 otherwise.
+
+9. KVMI_EVENT_MSR
+-----------------
+
+:Architectures: x86
+:Versions: >= 1
+:Actions: CONTINUE, CRASH
+:Parameters:
+
+::
+
+ struct kvmi_event;
+ struct kvmi_event_msr {
+ __u32 msr;
+ __u32 padding;
+ __u64 old_value;
+ __u64 new_value;
+ };
+
+:Returns:
+
+::
+
+ struct kvmi_vcpu_hdr;
+ struct kvmi_event_reply;
+ struct kvmi_event_msr_reply {
+ __u64 new_val;
+ };
+
+This event is sent when a model specific register is going to be changed
+and the introspection has been enabled for this event and for this specific
+register (...
2020 Jul 21
0
[PATCH v9 75/84] KVM: introspection: add KVMI_VCPU_CONTROL_MSR and KVMI_EVENT_MSR
...``write`` is 1 if the descriptor was written, 0 otherwise.
+
+9. KVMI_EVENT_MSR
+-----------------
+
+:Architectures: x86
+:Versions: >= 1
+:Actions: CONTINUE, CRASH
+:Parameters:
+
+::
+
+ struct kvmi_event;
+ struct kvmi_event_msr {
+ __u32 msr;
+ __u32 padding;
+ __u64 old_value;
+ __u64 new_value;
+ };
+
+:Returns:
+
+::
+
+ struct kvmi_vcpu_hdr;
+ struct kvmi_event_reply;
+ struct kvmi_event_msr_reply {
+ __u64 new_val;
+ };
+
+This event is sent when a model specific register is going to be changed
+and the introspection has been enabled for this event and for this specific
+register (...
2020 Feb 07
0
[RFC PATCH v7 60/78] KVM: introspection: add KVMI_VCPU_CONTROL_CR and KVMI_EVENT_CR
...n is used by the introspection tool for its own breakpoints.
+
+5. KVMI_EVENT_CR
+----------------
+
+:Architectures: x86
+:Versions: >= 1
+:Actions: CONTINUE, CRASH
+:Parameters:
+
+::
+
+ struct kvmi_event;
+ struct kvmi_event_cr {
+ __u16 cr;
+ __u16 padding[3];
+ __u64 old_value;
+ __u64 new_value;
+ };
+
+:Returns:
+
+::
+
+ struct kvmi_vcpu_hdr;
+ struct kvmi_event_reply;
+ struct kvmi_event_cr_reply {
+ __u64 new_val;
+ };
+
+This event is sent when a control register is going to be changed and the
+introspection has been enabled for this event and for this specific
+register (see **KV...
2016 Dec 07
0
[PATCH 3/4] vsock: add pkt cancel capability
...pkt(pkt);
> + }
> + atomic_sub(cnt, &vsock->queued_replies);
If we stopped rx because there were too many replies in flight then we
might be able to resume rx now:
/* Do we now have resources to resume rx processing? */
if (old_val >= virtqueue_get_vring_size(rx_vq) &&
new_val < virtqueue_get_vring_size(rx_vq))
queue_work(virtio_vsock_workqueue, &vsock->rx_work);
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2015 Oct 11
2
[PATCH] cpu.c: initialize a variable
Some debugging tools don't like if a code uses unitialized variables.
The code in cpu.c uses the value of fxsr.buff[50], so it makes sense
to explicitely initialize it (because fxsave can fail to do it).
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2016 Dec 07
1
[PATCH 3/4] vsock: add pkt cancel capability
Signed-off-by: Peng Tao <bergwolf at gmail.com>
---
net/vmw_vsock/virtio_transport.c | 36 ++++++++++++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/net/vmw_vsock/virtio_transport.c b/net/vmw_vsock/virtio_transport.c
index 936d7ee..f88b6ed 100644
--- a/net/vmw_vsock/virtio_transport.c
+++ b/net/vmw_vsock/virtio_transport.c
@@ -170,6 +170,41 @@
2020 Feb 07
0
[RFC PATCH v7 73/78] KVM: introspection: extend KVMI_GET_VERSION with struct kvmi_features
...if the introspection is
built in kernel).
diff --git a/arch/x86/include/uapi/asm/kvmi.h b/arch/x86/include/uapi/asm/kvmi.h
index f4be7d12f63a..8e2056ad11a7 100644
--- a/arch/x86/include/uapi/asm/kvmi.h
+++ b/arch/x86/include/uapi/asm/kvmi.h
@@ -139,4 +139,9 @@ struct kvmi_event_msr_reply {
__u64 new_val;
};
+struct kvmi_features {
+ __u8 singlestep;
+ __u8 padding[7];
+};
+
#endif /* _UAPI_ASM_X86_KVMI_H */
diff --git a/arch/x86/kvm/kvmi.c b/arch/x86/kvm/kvmi.c
index 4e8b8e0a2961..5cf266d13375 100644
--- a/arch/x86/kvm/kvmi.c
+++ b/arch/x86/kvm/kvmi.c
@@ -1100,6 +1100,11 @@ bool kvmi_arch_pf_e...
2007 Jul 12
1
[LLVMdev] Atomic Operation and Synchronization Proposal v2
On 7/12/07, Torvald Riegel <torvald at se.inf.tu-dresden.de> wrote:
> Here are some comments, quotes are from the draft.
>
> > an operation based constraint cannot guard other operations
>
> I think constraints associated with a particular instruction usually apply
> to this instruction and previous/subsequent instructions, so this wouldn't
> be true. This is the
2020 Jul 21
0
[PATCH v9 68/84] KVM: introspection: add KVMI_EVENT_XSETBV
...if its exception has been injected or overridden.
+
+7. KVMI_EVENT_XSETBV
+--------------------
+
+:Architectures: x86
+:Versions: >= 1
+:Actions: CONTINUE, CRASH
+:Parameters:
+
+::
+
+ struct kvmi_event;
+ struct kvmi_event_xsetbv {
+ __u8 xcr;
+ __u8 padding[7];
+ __u64 old_value;
+ __u64 new_value;
+ };
+
+:Returns:
+
+::
+
+ struct kvmi_vcpu_hdr;
+ struct kvmi_event_reply;
+
+This event is sent when the extended control register XCR is going
+to be changed and the introspection has been enabled for this event
+(see *KVMI_VCPU_CONTROL_EVENTS*).
+
+``kvmi_event``, the extended control regis...