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...tant folding and no consensus that it shouldn't be allowed then we should probably believe that someone will eventually do it. -Andy From: Ulrich Weigand [mailto:Ulrich.Weigand at de.ibm.com] Sent: Tuesday, January 09, 2018 9:59 AM To: Kaylor, Andrew <andrew.kaylor at intel.com>; kpn at neutralgood.org Cc: Hal Finkel <hfinkel at anl.gov>; Richard Smith <richard at metafoo.co.uk>; bob.huemmer at sas.com; bumblebritches57 at gmail.com; wei.ding2 at amd.com; cfe-dev at lists.llvm.org; llvm-dev <llvm-dev at lists.llvm.org> Subject: Re: [cfe-dev] Why is #pragma STDC FENV_ACCESS n...

.... > > -Andy >   <> > From: Ulrich Weigand [mailto:Ulrich.Weigand at de.ibm.com <mailto:Ulrich.Weigand at de.ibm.com>] > Sent: Tuesday, January 09, 2018 9:59 AM > To: Kaylor, Andrew <andrew.kaylor at intel.com <mailto:andrew.kaylor at intel.com>>; kpn at neutralgood.org <mailto:kpn at neutralgood.org> > Cc: Hal Finkel <hfinkel at anl.gov <mailto:hfinkel at anl.gov>>; Richard Smith <richard at metafoo.co.uk <mailto:richard at metafoo.co.uk>>; bob.huemmer at sas.com <mailto:bob.huemmer at sas.com>; bumblebritches57 at gmail...

...srats: Martina Koederitz | Geschäftsführung: Dirk Wittkopp Sitz der Gesellschaft: Böblingen | Registergericht: Amtsgericht Stuttgart, HRB 243294 From: "Kaylor, Andrew" <andrew.kaylor at intel.com> To: Ulrich Weigand <Ulrich.Weigand at de.ibm.com>, "kpn at neutralgood.org" <kpn at neutralgood.org> Cc: Hal Finkel <hfinkel at anl.gov>, Richard Smith <richard at metafoo.co.uk>, "bob.huemmer at sas.com" <bob.huemmer at sas.com>, "bumblebritches57 at gmail.com" <bumblebritches57 a...

Andrew Kaylor wrote: >In general, the current "strict FP" handling stops at instruction >selection. At the MachineIR level we don't currently have a mechanism >to prevent inappropriate optimizations based on floating point >constraints, or indeed to convey such constraints to the backend. >Implicit register use modeling may provide some restriction on some

...was all in place. I’m open to the possibility that that was a bad idea. -Andy From: rjmccall at apple.com [mailto:rjmccall at apple.com] Sent: Tuesday, January 09, 2018 11:12 AM To: Kaylor, Andrew <andrew.kaylor at intel.com> Cc: Ulrich Weigand <Ulrich.Weigand at de.ibm.com>; kpn at neutralgood.org; bumblebritches57 at gmail.com; bob.huemmer at sas.com; llvm-dev <llvm-dev at lists.llvm.org>; Richard Smith <richard at metafoo.co.uk>; cfe-dev at lists.llvm.org Subject: Re: [cfe-dev] Why is #pragma STDC FENV_ACCESS not supported? On Jan 9, 2018, at 1:53 PM, Kaylor, Andrew via c...

...sibility that that was a bad idea. -Andy *From:* rjmccall at apple.com [mailto:rjmccall at apple.com <rjmccall at apple.com>] *Sent:* Tuesday, January 09, 2018 11:12 AM *To:* Kaylor, Andrew <andrew.kaylor at intel.com> *Cc:* Ulrich Weigand <Ulrich.Weigand at de.ibm.com>; kpn at neutralgood.org; bumblebritches57 at gmail.com; bob.huemmer at sas.com; llvm-dev < llvm-dev at lists.llvm.org>; Richard Smith <richard at metafoo.co.uk>; cfe-dev at lists.llvm.org *Subject:* Re: [cfe-dev] Why is #pragma STDC FENV_ACCESS not supported? On Jan 9, 2018, at 1:53 PM, Kaylor, Andrew v...

...srats: Martina Koederitz | Geschäftsführung: Dirk Wittkopp Sitz der Gesellschaft: Böblingen | Registergericht: Amtsgericht Stuttgart, HRB 243294 From: "Kaylor, Andrew" <andrew.kaylor at intel.com> To: Ulrich Weigand <Ulrich.Weigand at de.ibm.com>, "kpn at neutralgood.org" <kpn at neutralgood.org> Cc: Hal Finkel <hfinkel at anl.gov>, Richard Smith <richard at metafoo.co.uk>, "bob.huemmer at sas.com" <bob.huemmer at sas.com>, "bumblebritches57 at gmail.com" <bumblebritches57 a...

...that unconditionally converts all > FP operations to the equivalent constrained intrinsics. You could > use that to do testing and find out what's broken. > > Thanks, > Andy > > > -----Original Message----- > From: Kevin P. Neal [mailto:kpn at neutralgood.org > <mailto:kpn at neutralgood.org>] > Sent: Monday, January 08, 2018 6:41 AM > To: Hal Finkel via cfe-dev <cfe-dev at lists.llvm.org > <mailto:cfe-dev at lists.llvm.org>> > Cc: Richard Smith <richard at metafoo.co.uk > <mailto:ric...

...probably believe > that someone will eventually do it. How would you prevent it? > -Andy > > > From: Ulrich Weigand [mailto:Ulrich.Weigand at de.ibm.com] > Sent: Tuesday, January 09, 2018 9:59 AM > To: Kaylor, Andrew <andrew.kaylor at intel.com>; kpn at neutralgood.org > Cc: Hal Finkel <hfinkel at anl.gov>; Richard Smith > <richard at metafoo.co.uk>; bob.huemmer at sas.com; > bumblebritches57 at gmail.com; wei.ding2 at amd.com; cfe-dev at lists.llvm.org; > llvm-dev <llvm-dev at lists.llvm.org> > Subject: Re: [cf...

...tch somewhere (stale by now, but I could refresh it pretty easily) that unconditionally converts all FP operations to the equivalent constrained intrinsics. You could use that to do testing and find out what's broken. Thanks, Andy -----Original Message----- From: Kevin P. Neal [mailto:kpn at neutralgood.org] Sent: Monday, January 08, 2018 6:41 AM To: Hal Finkel via cfe-dev <cfe-dev at lists.llvm.org> Cc: Richard Smith <richard at metafoo.co.uk>; Kaylor, Andrew <andrew.kaylor at intel.com>; Marcus Johnson <bumblebritches57 at gmail.com>; wei.ding2 at amd.com; Bob Huemmer &l...

...efresh it pretty easily) that unconditionally > converts all FP operations to the equivalent constrained intrinsics. You > could use that to do testing and find out what's broken. > > Thanks, > Andy > > > -----Original Message----- > From: Kevin P. Neal [mailto:kpn at neutralgood.org] > Sent: Monday, January 08, 2018 6:41 AM > To: Hal Finkel via cfe-dev <cfe-dev at lists.llvm.org> > Cc: Richard Smith <richard at metafoo.co.uk>; Kaylor, Andrew < > andrew.kaylor at intel.com>; Marcus Johnson <bumblebritches57 at gmail.com>; > wei.ding2 a...

...efresh it pretty easily) that unconditionally > converts all FP operations to the equivalent constrained intrinsics. You > could use that to do testing and find out what's broken. > > Thanks, > Andy > > > -----Original Message----- > From: Kevin P. Neal [mailto:kpn at neutralgood.org] > Sent: Monday, January 08, 2018 6:41 AM > To: Hal Finkel via cfe-dev <cfe-dev at lists.llvm.org> > Cc: Richard Smith <richard at metafoo.co.uk>; Kaylor, Andrew < > andrew.kaylor at intel.com>; Marcus Johnson <bumblebritches57 at gmail.com>; > wei.ding2 a...

...IRBuilder that leverages the state Hal is suggesting, but representing the pragma in the AST is, I think, more about the mechanism that will indicate how to set that state. I will say that I like Hal's suggestion very much. -Andy -----Original Message----- From: Kevin P. Neal [mailto:kpn at neutralgood.org] Sent: Tuesday, January 09, 2018 8:05 AM To: via cfe-dev <cfe-dev at lists.llvm.org> Cc: Richard Smith <richard at metafoo.co.uk>; Kaylor, Andrew <andrew.kaylor at intel.com>; Nelson, Clark <clark.nelson at intel.com>; Marcus Johnson <bumblebritches57 at gmail.com&gt...

I'm working with Andrew on D43515 right now, and some of these unanswered questions are directly relevant to that patch. So.... On Fri, Feb 09, 2018 at 03:42:20PM +0100, Ulrich Weigand wrote: > C) Floating-point exceptions > If a mask bit in the floating-point status register is set, then all FP > instructions will *trap* whenever an IEEE exception condition is >