search for: nemacorepseudo

after a long time i managed to make a progress with this problem. i can store and load fp16 as i16 in to some registers and do an add instruction. the problem now is that this messes up the real i16 (short, unsigned short). i have def FADD_H : NemaCorePseudo< (outs HGR16:$fd), (ins HGR16:$fs, HGR16:$ft), "add.h\t$fd, $fs, $ft", [(set (i16 HGR16:$fd),(i16 (f32_to_f16 (f32 (fadd (f32 (f16_to_f32 (i16 HGR16:$fs))),...

Hi Nikos > and when i try to call llc produces this error > > LLVM ERROR: Cannot select: 0x234bab0: f16 = fadd 0x234b8b0, 0x234c2b0 > [ORD=9] [ID=29] This error suggests things are working on the generic LLVM side (as I'd expect). It's what I'd expect to see for your code snippet if there wasn't a target-specific pattern that could handle the addition properly and

> def FADD_H : NemaCorePseudo< (outs HGR16:$fd), (ins HGR16:$fs, HGR16:$ft), > "add.h\t$fd, $fs, $ft", [(set (i16 HGR16:$fd),(i16 (f32_to_f16 (f32 (fadd > (f32 (f16_to_f32 (i16 HGR16:$fs))), > (f32 (f16_to_f32 (i16 HGR16:$ft))))))))]>; > > so i can have a half floating point add two half point var...

hi all, i am trying to implement native support for fp16 in llvm-3.1 i have already used the opencl patch for clang so the IR that is generated is correct. i tried to add some code so the the fp16 type is handled correctly but no luck. We have a target that has native fp16 units and tried to run a simple program int main () { __fp16 a,b,c,d; a= 1.1; b=2.2; c=3.3;