Displaying 1 result from an estimated 1 matches for "nemacoreisd".
2012 Nov 02
2
[LLVMdev] Half Float fp16 Native Support
...8e70: i32 = undef [ORD=1] [ID=3]
0x234c2b0: f16,ch = load 0x23207a0, 0x234dd10,
0x2348e70<LD2[ConstantPool]> [ID=24]
0x234dd10: i32 = add 0x2349370, 0x234dc10 [ID=22]
0x2349370: i32,ch = load 0x23207a0, 0x234c3b0,
0x2348e70<LD4[ConstantPool]> [ID=20]
0x234c3b0: i32 = NemaCoreISD::Wrapper 0x2349870, 0x2349670 [ID=17]
0x2349870: i32 = Register %GP [ID=14]
0x2349670: i32 = TargetConstantPool<half 0x400A680000000000> 0
[TF=2] [ID=13]
0x2348e70: i32 = undef [ORD=1] [ID=3]
0x234dc10: i32 = NemaCoreISD::Lo 0x2349570 [ID=18]
0x234957...