Displaying 7 results from an estimated 7 matches for "neg_add".
2015 Jan 11
1
[PATCH 1/3] nv50/ir: Add support for MAD short+IMM notation
...CodeEmitterNV50::emitFMAD(const Instruction *i)
>>
>> code[0] = 0xe0000000;
>>
>> + if (i->src(1).getFile() == FILE_IMMEDIATE) {
>> + code[1] = 0;
>> + emitForm_IMM(i);
>> + code[0] |= neg_mul << 15;
>> + code[0] |= neg_add << 22;
>> + if (i->saturate)
>> + code[0] |= 1 << 8;
>> + } else
>> if (i->encSize == 4) {
>> emitForm_MUL(i);
>> - assert(!neg_mul && !neg_add);
>> + code[0] |= neg_mul << 15;
>> +...
2015 Jan 11
6
[PATCH 1/3] nv50/ir: Add support for MAD short+IMM notation
...m/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp
@@ -939,9 +939,20 @@ CodeEmitterNV50::emitFMAD(const Instruction *i)
code[0] = 0xe0000000;
+ if (i->src(1).getFile() == FILE_IMMEDIATE) {
+ code[1] = 0;
+ emitForm_IMM(i);
+ code[0] |= neg_mul << 15;
+ code[0] |= neg_add << 22;
+ if (i->saturate)
+ code[0] |= 1 << 8;
+ } else
if (i->encSize == 4) {
emitForm_MUL(i);
- assert(!neg_mul && !neg_add);
+ code[0] |= neg_mul << 15;
+ code[0] |= neg_add << 22;
+ if (i->saturate)
+...
2015 Jan 23
3
[PATCH 1/2] nv50/ir: Add support for MAD short+IMM notation
...m/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp
@@ -939,9 +939,20 @@ CodeEmitterNV50::emitFMAD(const Instruction *i)
code[0] = 0xe0000000;
+ if (i->src(1).getFile() == FILE_IMMEDIATE) {
+ code[1] = 0;
+ emitForm_IMM(i);
+ code[0] |= neg_mul << 15;
+ code[0] |= neg_add << 22;
+ if (i->saturate)
+ code[0] |= 1 << 8;
+ } else
if (i->encSize == 4) {
emitForm_MUL(i);
- assert(!neg_mul && !neg_add);
+ code[0] |= neg_mul << 15;
+ code[0] |= neg_add << 22;
+ if (i->saturate)
+...
2015 Jan 11
0
[PATCH 1/3] nv50/ir: Add support for MAD short+IMM notation
...50.cpp
> @@ -939,9 +939,20 @@ CodeEmitterNV50::emitFMAD(const Instruction *i)
>
> code[0] = 0xe0000000;
>
> + if (i->src(1).getFile() == FILE_IMMEDIATE) {
> + code[1] = 0;
> + emitForm_IMM(i);
> + code[0] |= neg_mul << 15;
> + code[0] |= neg_add << 22;
> + if (i->saturate)
> + code[0] |= 1 << 8;
> + } else
> if (i->encSize == 4) {
> emitForm_MUL(i);
> - assert(!neg_mul && !neg_add);
> + code[0] |= neg_mul << 15;
> + code[0] |= neg_add <<...
2015 Feb 06
2
[PATCH 1/3] nv50/ir: Add support for MAD 4-byte opcode
...4bab 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp
@@ -941,7 +941,10 @@ CodeEmitterNV50::emitFMAD(const Instruction *i)
if (i->encSize == 4) {
emitForm_MUL(i);
- assert(!neg_mul && !neg_add);
+ code[0] |= neg_mul << 15;
+ code[0] |= neg_add << 22;
+ if (i->saturate)
+ code[0] |= 1 << 8;
} else {
code[1] = neg_mul << 26;
code[1] |= neg_add << 27;
@@ -1931,11 +1934,6 @@ CodeEmitterNV50::getMinEncodingSize(const I...
2015 Jan 13
3
nv50/ir: Implement short notation for MAD V2
V2: clarify code, commit msgs, add comments. Drop code to was supposed to
make register assignment prefer SDST == SRC2 (patch 2) for now, because it
didn't quite do what I intended.
2015 Feb 23
2
[PATCH 1/2] nv50/ir: add fp64 support on G200 (NVA0)
...;
+ code[1] |= i->src(1).mod.neg() << 27;
+
emitForm_MAD(i);
}
@@ -963,6 +968,26 @@ CodeEmitterNV50::emitFMAD(const Instruction *i)
}
void
+CodeEmitterNV50::emitDMAD(const Instruction *i)
+{
+ const int neg_mul = i->src(0).mod.neg() ^ i->src(1).mod.neg();
+ const int neg_add = i->src(2).mod.neg();
+
+ assert(i->encSize == 8);
+ assert(!i->saturate);
+
+ code[1] = 0x40000000;
+ code[0] = 0xe0000000;
+
+ code[1] |= neg_mul << 26;
+ code[1] |= neg_add << 27;
+
+ roundMode_MAD(i);
+
+ emitForm_MAD(i);
+}
+
+void
CodeEmitterNV50::emitFA...