search for: ncmin

...->cpuaddr, mem->handle); - page = pfn_to_page(mem->pages[i] >> PAGE_SHIFT); - dma_release_from_contiguous(dev, page, 1); - } - - kfree(mem->pages); + kfree(mem->base.pages); kfree(mem); } @@ -58,11 +58,9 @@ gk20a_ram_get(struct nouveau_fb *pfb, u64 size, u32 align, u32 ncmin, u32 memtype, struct nouveau_mem **pmem) { struct device *dev = nv_device_base(nv_device(pfb)); - struct nouveau_mem *mem; - int type = memtype & 0xff; - dma_addr_t dma_addr; - int npages; - int order; + struct gk20a_mem *mem; + u32 type = memtype & 0xff; + u32 npages, order; in...

Fix a very shameful memory leak and a compilation error due to the use of non-exported CMA functions. The workaround for the latter is not really elegant (replace the CMA functions by a runtime failure if we are compiled as a module), but is temporary and still an improvement over the current situation (compile error). Alexandre Courbot (2): drm/gk20a/fb: fix huge memory leak drm/gk20a/fb:

...) { + struct page *page; + + if (mem->pages[i] == 0) + break; + + page = pfn_to_page(dma_to_pfn(dev, mem->pages[i])); + dma_release_from_contiguous(dev, page, 1); + } + + kfree(mem->pages); + kfree(mem); +} + +static int +gk20a_ram_get(struct nouveau_fb *pfb, u64 size, u32 align, u32 ncmin, + u32 memtype, struct nouveau_mem **pmem) +{ + struct device *dev = nv_device_base(nv_device(pfb)); + struct nouveau_mem *mem; + int type = memtype & 0xff; + dma_addr_t dma_addr; + int npages; + int order; + int i; + + nv_debug(pfb, "%s: size: %llx align: %x, ncmin: %x\n", __fun...

...nouveau/core/subdev/fb/nvc0.c b/drivers/gpu/drm/nouveau/core/subdev/fb/nvc0.c index 306bdf1..7606ed1 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/fb/nvc0.c +++ b/drivers/gpu/drm/nouveau/core/subdev/fb/nvc0.c @@ -145,14 +145,14 @@ nvc0_fb_vram_new(struct nouveau_fb *pfb, u64 size, u32 align, u32 ncmin, mem->memtype = type; mem->size = size; - mutex_lock(&mm->mutex); + mutex_lock(&pfb->base.mutex); do { if (back) ret = nouveau_mm_tail(mm, 1, size, ncmin, align, &r); else ret = nouveau_mm_head(mm, 1, size, ncmin, align, &r); if (ret) { - mutex...

On Mon, Apr 21, 2014 at 03:02:16PM +0900, Alexandre Courbot wrote: [...] > diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/ramgk20a.c b/drivers/gpu/drm/nouveau/core/subdev/fb/ramgk20a.c [...] > + pages = dma_alloc_from_contiguous(dev, ncmin, order); > + if (!pages) { > + gk20a_ram_put(pfb, &mem); > + return -ENOMEM; > + } > + > + dma_addr = pfn_to_dma(nv_device_base(nv_device(pfb)), > + page_to_pfn(pages)); This breaks compilation on x86 because neither pfn_to_dma() nor dma_to_pfn() are availa...

Hi everyone, Way overdue v2 of the final patches that enable basic GK20A support. Hopefully all the issues raised with v1 have been addressed. Changes since v1: - Use gk20a clock driver by Ben instead of twiddling nv04's - Name new classes after gk20a instead of nvea - Addressed comments about BAR initialization code factorization - Removed non-essential code which only purpose was to avoid

Latest patches for GK20A, taking comments received for v3 into account. Changes since v3: - use only pfn_to_page() and page_to_pfn() in GK20A's FB. These functions are present on every arch and the physical address to page frame number conversion is also consistently a shift of PAGE_SHIFT. This part will probably be replaced by something nicer in the future anyway. - fixed a warning on

..., + u32 size_nc, u32 memtype, struct nouveau_mem **); void nv50_vram_del(struct drm_device *, struct nouveau_mem **); bool nv50_vram_flags_valid(struct drm_device *, u32 tile_flags); int nvc0_vram_init(struct drm_device *); -int nvc0_vram_new(struct drm_device *, u64 size, u32 align, u32 ncmin, - u32 memtype, struct nouveau_mem **); +int nvc0_vram_new(struct drm_device *, u32 base, u64 size, u32 align, + u32 ncmin, u32 memtype, struct nouveau_mem **); bool nvc0_vram_flags_valid(struct drm_device *, u32 tile_flags); #endif diff --git a/drivers/gpu/drm/nouveau/nouveau_vm.c b/...

...Alexandre Courbot wrote: >> [...] >>> >>> diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/ramgk20a.c >>> b/drivers/gpu/drm/nouveau/core/subdev/fb/ramgk20a.c >> >> [...] >>> >>> + pages = dma_alloc_from_contiguous(dev, ncmin, order); >>> + if (!pages) { >>> + gk20a_ram_put(pfb, &mem); >>> + return -ENOMEM; >>> + } >>> + >>> + dma_addr = pfn_to_dma(nv_device_base(nv_device(pfb))...

Changes since v2: - Enabled software class - Removed unneeded changes to nouveau_accel_init() - Replaced use of architecture-private pfn_to_dma() and dma_to_pfn() with the portable page_to_phys()/phys_to_page() - Fixed incorrect comment/commit log talking about bytes instead of words Hope this looks good! Once this gets merged the next set will be to use this driver on Jetson and Venice2

Hi everyone, Here is the second batch of patches to add GK20A support to Nouveau. This time we are adding the actual chip support, and this series brings the driver to a point where a slightly-tweaked Mesa successfully runs shaders and renders triangles on GBM! Many thanks to Thierry Reding and the people on the #nouveau IRC channel for their help without which we would not have reached this

...ely(mem == NULL)) - return; - - if (likely(mem->cpuaddr)) - dma_free_coherent(dev, mem->base.size << PAGE_SHIFT, - mem->cpuaddr, mem->handle); - - kfree(mem->base.pages); - kfree(mem); + BUG(); } static int gk20a_ram_get(struct nvkm_fb *pfb, u64 size, u32 align, u32 ncmin, u32 memtype, struct nvkm_mem **pmem) { - struct device *dev = nv_device_base(nv_device(pfb)); - struct gk20a_mem *mem; - u32 type = memtype & 0xff; - u32 npages, order; - int i; - - nv_debug(pfb, "%s: size: %llx align: %x, ncmin: %x\n", __func__, size, - align, ncmin); - -...

...nouveau_fb *pfb, u32 tile_flags) { u8 memtype = (tile_flags & 0x0000ff00) >> 8; - return likely((types[memtype] == 1)); + return likely((nvc0_pte_storage_type_map[memtype] != 0xff)); } static int @@ -130,6 +111,7 @@ nvc0_fb_vram_new(struct nouveau_fb *pfb, u64 size, u32 align, u32 ncmin, int type = (memtype & 0x0ff); int back = (memtype & 0x800); int ret; + const bool comp = nvc0_pte_storage_type_map[type] != type; size >>= 12; align >>= 12; @@ -142,10 +124,22 @@ nvc0_fb_vram_new(struct nouveau_fb *pfb, u64 size, u32 align, u32 ncmin, return -EN...

...Signed by an unknown key > > On Mon, Apr 21, 2014 at 03:02:16PM +0900, Alexandre Courbot wrote: > [...] >> diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/ramgk20a.c b/drivers/gpu/drm/nouveau/core/subdev/fb/ramgk20a.c > [...] >> + pages = dma_alloc_from_contiguous(dev, ncmin, order); >> + if (!pages) { >> + gk20a_ram_put(pfb, &mem); >> + return -ENOMEM; >> + } >> + >> + dma_addr = pfn_to_dma(nv_device_base(nv_device(pfb)), >> + page_to_pfn(pages)); > > This breaks compilation on x86 because neither pfn...

...[...] > >>> > >>> diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/ramgk20a.c > >>> b/drivers/gpu/drm/nouveau/core/subdev/fb/ramgk20a.c > >> > >> [...] > >>> > >>> + pages = dma_alloc_from_contiguous(dev, ncmin, order); > >>> + if (!pages) { > >>> + gk20a_ram_put(pfb, &mem); > >>> + return -ENOMEM; > >>> + } > >>> + > >>> + dma_addr = pfn_to_dma(...

...>> >>> diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/ramgk20a.c >> >>> b/drivers/gpu/drm/nouveau/core/subdev/fb/ramgk20a.c >> >> >> >> [...] >> >>> >> >>> + pages = dma_alloc_from_contiguous(dev, ncmin, order); >> >>> + if (!pages) { >> >>> + gk20a_ram_put(pfb, &mem); >> >>> + return -ENOMEM; >> >>> + } >> >>> + >> >>> +...

Changes since v3: - Use a single dma_attr for all DMA-API allocations in instmem instead of one per allocation - Use device.info.ram_size instead of pfb->ram to check whether VRAM is present outside of nvkm Changes since v2: - Cleaner changes for ltc - Fixed typos in gk20a instmem IOMMU comments Changes since v1: - Add missing else condition in ltc - Remove extra flags that slipped into

Changes since v1: - Add missing else condition in ltc - Remove extra flags that slipped into nouveau_display.c and nv84_fence.c. Original cover letter: Patches 1-3 make the presence of a RAM device optional, and remove GK20A's dummy RAM driver we were using so far. On chips using shared memory, such a device can confuse the driver into moving objects where there is no need to, and can trick

A series I have waited too long to submit, and the recent refactoring made me pay the price of my perfectionism, so here are the features that are at least completed Patches 1-3 make the presence of a RAM device optional, and remove GK20A's dummy RAM driver we were using so far. On chips using shared memory, such a device can confuse the driver into moving objects where there is no need to,

Thanks Ilia for the v2 review! Here is the v3 of this IOMMU support for GK20A series. Changes since v2: - Cleaner changes for ltc - Fixed typos in gk20a instmem IOMMU comments Changes since v1: - Add missing else condition in ltc - Remove extra flags that slipped into nouveau_display.c and nv84_fence.c. Original cover letter: Patches 1-3 make the presence of a RAM device optional, and remove