search for: native_wbinvd

...a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/special_insns.h index a24dfcf79f4a..ac402c6fc24b 100644 --- a/arch/x86/include/asm/special_insns.h +++ b/arch/x86/include/asm/special_insns.h @@ -128,7 +128,7 @@ static inline void __write_pkru(u32 pkru) } #endif -static inline void native_wbinvd(void) +static inline void wbinvd(void) { asm volatile("wbinvd": : :"memory"); } @@ -183,11 +183,6 @@ static inline void __write_cr4(unsigned long x) native_write_cr4(x); } -static inline void wbinvd(void) -{ - native_wbinvd(); -} - #ifdef CONFIG_X86_64 static inline...

...ne unsigned long native_read_cr4(void) +{ + unsigned long val; + asm volatile("movq %%cr4,%0\n\t" :"=r" (val)); + return val; +} + +static inline void native_write_cr4(unsigned long val) +{ + asm volatile("movq %0,%%cr4": :"r" (val)); +} + +static inline void native_wbinvd(void) +{ + asm volatile("wbinvd": : :"memory"); +} + +#ifdef CONFIG_PARAVIRT +#include <asm/paravirt.h> +#else /* * Clear and set 'TS' bit respectively */ -#define clts() __asm__ __volatile__ ("clts") - -static inline unsigned long read_cr0(void) -{...

...ne unsigned long native_read_cr4(void) +{ + unsigned long val; + asm volatile("movq %%cr4,%0\n\t" :"=r" (val)); + return val; +} + +static inline void native_write_cr4(unsigned long val) +{ + asm volatile("movq %0,%%cr4": :"r" (val)); +} + +static inline void native_wbinvd(void) +{ + asm volatile("wbinvd": : :"memory"); +} + +#ifdef CONFIG_PARAVIRT +#include <asm/paravirt.h> +#else /* * Clear and set 'TS' bit respectively */ -#define clts() __asm__ __volatile__ ("clts") - -static inline unsigned long read_cr0(void) -{...

...t.c @@ -311,10 +311,6 @@ struct paravirt_patch_template pv_ops = { .cpu.read_cr0 = native_read_cr0, .cpu.write_cr0 = native_write_cr0, .cpu.write_cr4 = native_write_cr4, -#ifdef CONFIG_X86_64 - .cpu.read_cr8 = native_read_cr8, - .cpu.write_cr8 = native_write_cr8, -#endif .cpu.wbinvd = native_wbinvd, .cpu.read_msr = native_read_msr, .cpu.write_msr = native_write_msr, diff --git a/arch/x86/power/cpu.c b/arch/x86/power/cpu.c index 24b079e94bc2..1c58d8982728 100644 --- a/arch/x86/power/cpu.c +++ b/arch/x86/power/cpu.c @@ -122,9 +122,6 @@ static void __save_processor_state(struct saved_conte...

...t.c @@ -311,10 +311,6 @@ struct paravirt_patch_template pv_ops = { .cpu.read_cr0 = native_read_cr0, .cpu.write_cr0 = native_write_cr0, .cpu.write_cr4 = native_write_cr4, -#ifdef CONFIG_X86_64 - .cpu.read_cr8 = native_read_cr8, - .cpu.write_cr8 = native_write_cr8, -#endif .cpu.wbinvd = native_wbinvd, .cpu.read_msr = native_read_msr, .cpu.write_msr = native_write_msr, diff --git a/arch/x86/power/cpu.c b/arch/x86/power/cpu.c index 24b079e94bc2..1c58d8982728 100644 --- a/arch/x86/power/cpu.c +++ b/arch/x86/power/cpu.c @@ -122,9 +122,6 @@ static void __save_processor_state(struct saved_conte...

...t.c @@ -311,10 +311,6 @@ struct paravirt_patch_template pv_ops = { .cpu.read_cr0 = native_read_cr0, .cpu.write_cr0 = native_write_cr0, .cpu.write_cr4 = native_write_cr4, -#ifdef CONFIG_X86_64 - .cpu.read_cr8 = native_read_cr8, - .cpu.write_cr8 = native_write_cr8, -#endif .cpu.wbinvd = native_wbinvd, .cpu.read_msr = native_read_msr, .cpu.write_msr = native_write_msr, diff --git a/arch/x86/power/cpu.c b/arch/x86/power/cpu.c index 24b079e94bc2..1c58d8982728 100644 --- a/arch/x86/power/cpu.c +++ b/arch/x86/power/cpu.c @@ -122,9 +122,6 @@ static void __save_processor_state(struct saved_conte...

...t.c @@ -311,10 +311,6 @@ struct paravirt_patch_template pv_ops = { .cpu.read_cr0 = native_read_cr0, .cpu.write_cr0 = native_write_cr0, .cpu.write_cr4 = native_write_cr4, -#ifdef CONFIG_X86_64 - .cpu.read_cr8 = native_read_cr8, - .cpu.write_cr8 = native_write_cr8, -#endif .cpu.wbinvd = native_wbinvd, .cpu.read_msr = native_read_msr, .cpu.write_msr = native_write_msr, diff --git a/arch/x86/power/cpu.c b/arch/x86/power/cpu.c index 24b079e94bc2..1c58d8982728 100644 --- a/arch/x86/power/cpu.c +++ b/arch/x86/power/cpu.c @@ -122,9 +122,6 @@ static void __save_processor_state(struct saved_conte...

...ed int native_read_cr4(void); -fastcall unsigned int native_read_cr4_safe(void); -fastcall void native_write_cr4(unsigned int val); +fastcall unsigned long native_read_cr4(void); +fastcall unsigned long native_read_cr4_safe(void); +fastcall void native_write_cr4(unsigned long val); fastcall void native_wbinvd(void);

...ed int native_read_cr4(void); -fastcall unsigned int native_read_cr4_safe(void); -fastcall void native_write_cr4(unsigned int val); +fastcall unsigned long native_read_cr4(void); +fastcall unsigned long native_read_cr4_safe(void); +fastcall void native_write_cr4(unsigned long val); fastcall void native_wbinvd(void);

...rt_end_context_switch(struct task_struct *next) arch_enter_lazy_mmu_mode(); } -static noinstr unsigned long pv_native_read_cr2(void) -{ - return native_read_cr2(); -} - static noinstr void pv_native_write_cr2(unsigned long val) { native_write_cr2(val); @@ -222,16 +217,6 @@ noinstr void pv_native_wbinvd(void) native_wbinvd(); } -static noinstr void pv_native_irq_enable(void) -{ - native_irq_enable(); -} - -static noinstr void pv_native_irq_disable(void) -{ - native_irq_disable(); -} - static noinstr void pv_native_safe_halt(void) { native_safe_halt(); @@ -298,7 +283,7 @@ struct paravirt_p...

Hi, At Ingo's request, here it goes a new patchset, that actually applies ontop of the x86 tree (mm branch). Besides this issue, I've also included a patch that remove the cr8 references, as Andi suggested.

Hi, At Ingo's request, here it goes a new patchset, that actually applies ontop of the x86 tree (mm branch). Besides this issue, I've also included a patch that remove the cr8 references, as Andi suggested.

...IG_X86_32 > /* > diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c > index 58bcfb67c01f..f68e48f5f6c2 100644 > --- a/arch/x86/kernel/paravirt.c > +++ b/arch/x86/kernel/paravirt.c > @@ -351,9 +351,7 @@ __visible struct pv_cpu_ops pv_cpu_ops = { > .wbinvd = native_wbinvd, > .read_msr = native_read_msr_safe, > .write_msr = native_write_msr_safe, > - .read_tsc = native_read_tsc, > .read_pmc = native_read_pmc, > - .read_tscp = native_read_tscp, > .load_tr_desc = native_load_tr_desc, > .set_ldt = native_set_ldt, > .load_gdt = native_...

...IG_X86_32 > /* > diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c > index 58bcfb67c01f..f68e48f5f6c2 100644 > --- a/arch/x86/kernel/paravirt.c > +++ b/arch/x86/kernel/paravirt.c > @@ -351,9 +351,7 @@ __visible struct pv_cpu_ops pv_cpu_ops = { > .wbinvd = native_wbinvd, > .read_msr = native_read_msr_safe, > .write_msr = native_write_msr_safe, > - .read_tsc = native_read_tsc, > .read_pmc = native_read_pmc, > - .read_tscp = native_read_tscp, > .load_tr_desc = native_load_tr_desc, > .set_ldt = native_set_ldt, > .load_gdt = native_...

...r4 = native_read_cr4, - .read_cr4_safe = native_read_cr4_safe, - .write_cr4 = native_write_cr4, - .save_fl = native_save_fl, - .restore_fl = native_restore_fl, - .irq_disable = native_irq_disable, - .irq_enable = native_irq_enable, - .safe_halt = native_safe_halt, - .halt = native_halt, - .wbinvd = native_wbinvd, - .read_msr = native_read_msr_safe, - .write_msr = native_write_msr_safe, - .read_tsc = native_read_tsc, - .read_pmc = native_read_pmc, - .sched_clock = native_sched_clock, - .get_cpu_khz = native_calculate_cpu_khz, - .load_tr_desc = native_load_tr_desc, - .set_ldt = native_set_ldt, - .load_gdt =...

...r4 = native_read_cr4, - .read_cr4_safe = native_read_cr4_safe, - .write_cr4 = native_write_cr4, - .save_fl = native_save_fl, - .restore_fl = native_restore_fl, - .irq_disable = native_irq_disable, - .irq_enable = native_irq_enable, - .safe_halt = native_safe_halt, - .halt = native_halt, - .wbinvd = native_wbinvd, - .read_msr = native_read_msr_safe, - .write_msr = native_write_msr_safe, - .read_tsc = native_read_tsc, - .read_pmc = native_read_pmc, - .sched_clock = native_sched_clock, - .get_cpu_khz = native_calculate_cpu_khz, - .load_tr_desc = native_load_tr_desc, - .set_ldt = native_set_ldt, - .load_gdt =...

...r4 = native_read_cr4, - .read_cr4_safe = native_read_cr4_safe, - .write_cr4 = native_write_cr4, - .save_fl = native_save_fl, - .restore_fl = native_restore_fl, - .irq_disable = native_irq_disable, - .irq_enable = native_irq_enable, - .safe_halt = native_safe_halt, - .halt = native_halt, - .wbinvd = native_wbinvd, - .read_msr = native_read_msr_safe, - .write_msr = native_write_msr_safe, - .read_tsc = native_read_tsc, - .read_pmc = native_read_pmc, - .sched_clock = native_sched_clock, - .get_cpu_khz = native_calculate_cpu_khz, - .load_tr_desc = native_load_tr_desc, - .set_ldt = native_set_ldt, - .load_gdt =...

...r4 = native_read_cr4, - .read_cr4_safe = native_read_cr4_safe, - .write_cr4 = native_write_cr4, - .save_fl = native_save_fl, - .restore_fl = native_restore_fl, - .irq_disable = native_irq_disable, - .irq_enable = native_irq_enable, - .safe_halt = native_safe_halt, - .halt = native_halt, - .wbinvd = native_wbinvd, - .read_msr = native_read_msr_safe, - .write_msr = native_write_msr_safe, - .read_tsc = native_read_tsc, - .read_pmc = native_read_pmc, - .sched_clock = native_sched_clock, - .get_cpu_khz = native_calculate_cpu_khz, - .load_tr_desc = native_load_tr_desc, - .set_ldt = native_set_ldt, - .load_gdt =...

...rt_end_context_switch(struct task_struct *next) arch_enter_lazy_mmu_mode(); } -static noinstr unsigned long pv_native_read_cr2(void) -{ - return native_read_cr2(); -} - static noinstr void pv_native_write_cr2(unsigned long val) { native_write_cr2(val); @@ -222,16 +217,6 @@ noinstr void pv_native_wbinvd(void) native_wbinvd(); } -static noinstr void pv_native_irq_enable(void) -{ - native_irq_enable(); -} - -static noinstr void pv_native_irq_disable(void) -{ - native_irq_disable(); -} - static noinstr void pv_native_safe_halt(void) { native_safe_halt(); @@ -298,7 +283,7 @@ struct paravirt_p...

...id = native_cpuid, - .get_debugreg = native_get_debugreg, - .set_debugreg = native_set_debugreg, - .read_cr0 = native_read_cr0, - .write_cr0 = native_write_cr0, - .write_cr4 = native_write_cr4, -#ifdef CONFIG_X86_64 - .read_cr8 = native_read_cr8, - .write_cr8 = native_write_cr8, -#endif - .wbinvd = native_wbinvd, - .read_msr = native_read_msr, - .write_msr = native_write_msr, - .read_msr_safe = native_read_msr_safe, - .write_msr_safe = native_write_msr_safe, - .read_pmc = native_read_pmc, - .load_tr_desc = native_load_tr_desc, - .set_ldt = native_set_ldt, - .load_gdt = native_load_gdt, - .load_idt = native...