search for: native_queue_unlock

...e (pn->head == INVALID_HEAD) > + cpu_relax(); > + > + if (WARN_ON_ONCE(pn->head == NO_HEAD)) > + return; > + > + pv_kick(pn->head); > +} > + > +void __pv_queue_unlock(struct qspinlock *lock) > +{ > + int val = atomic_read(&lock->val); > + > + native_queue_unlock(lock); > + > + if (val& _Q_LOCKED_SLOW) > + ___pv_kick_head(lock); > +} > + Again a race can happen here between the reading and writing of the lock value. I can't think of a good way to do that without using cmpxchg. > +#else > + > +static inline void pv_init_n...

...e (pn->head == INVALID_HEAD) > + cpu_relax(); > + > + if (WARN_ON_ONCE(pn->head == NO_HEAD)) > + return; > + > + pv_kick(pn->head); > +} > + > +void __pv_queue_unlock(struct qspinlock *lock) > +{ > + int val = atomic_read(&lock->val); > + > + native_queue_unlock(lock); > + > + if (val& _Q_LOCKED_SLOW) > + ___pv_kick_head(lock); > +} > + Again a race can happen here between the reading and writing of the lock value. I can't think of a good way to do that without using cmpxchg. > +#else > + > +static inline void pv_init_n...

...ne queue_spin_unlock queue_spin_unlock /** * queue_spin_unlock - release a queue spinlock * @lock : Pointer to queue spinlock structure * * An effective smp_store_release() on the least-significant byte. */ -static inline void queue_spin_unlock(struct qspinlock *lock) +static inline void native_queue_unlock(struct qspinlock *lock) { barrier(); ACCESS_ONCE(*(u8 *)lock) = 0; } +#else + +static inline void native_queue_unlock(struct qspinlock *lock) +{ + atomic_dec(&lock->val); +} + #endif /* !CONFIG_X86_OOSTORE && !CONFIG_X86_PPRO_FENCE */ +#define queue_spin_unlock queue_spin_...

Il 17/06/2014 00:08, Waiman Long ha scritto: >> +void __pv_queue_unlock(struct qspinlock *lock) >> +{ >> + int val = atomic_read(&lock->val); >> + >> + native_queue_unlock(lock); >> + >> + if (val & _Q_LOCKED_SLOW) >> + ___pv_kick_head(lock); >> +} >> + > > Again a race can happen here between the reading and writing of the lock > value. I can't think of a good way to do that without using cmpxchg. Could you just use x...

...(lock=0xffffffff81eb0e58) at /test/master/arch/x86/include/asm/paravirt.h:744 #5 __pv_wait_head (lock=0xffffffff81eb0e58) at kernel/locking/qspinlock.c:352 Value of lock seem to be 524288 (means already unlocked?) So apart from races Waiman mentioned, are we also in need of smp_mb() here and/or native_queue_unlock()?. Interestingly I see other cpu stuck at multi_cpu_stop(). (gdb) thr 1 [Switching to thread 1 (Thread 1)]#0 multi_cpu_stop (data=0xffff8802140d1da0) at kernel/stop_machine.c:192 192 if (msdata->state != curstate) { Or is it I am missing something. please let me know if .config need to...

...(lock=0xffffffff81eb0e58) at /test/master/arch/x86/include/asm/paravirt.h:744 #5 __pv_wait_head (lock=0xffffffff81eb0e58) at kernel/locking/qspinlock.c:352 Value of lock seem to be 524288 (means already unlocked?) So apart from races Waiman mentioned, are we also in need of smp_mb() here and/or native_queue_unlock()?. Interestingly I see other cpu stuck at multi_cpu_stop(). (gdb) thr 1 [Switching to thread 1 (Thread 1)]#0 multi_cpu_stop (data=0xffff8802140d1da0) at kernel/stop_machine.c:192 192 if (msdata->state != curstate) { Or is it I am missing something. please let me know if .config need to...

Since Waiman seems incapable of doing simple things; here's my take on the paravirt crap. The first few patches are taken from Waiman's latest series, but the virt support is completely new. Its primary aim is to not mess up the native code. I've not stress tested it, but the virt and paravirt (kvm) cases boot on simple smp guests. I've not done Xen, but the patch should be

Since Waiman seems incapable of doing simple things; here's my take on the paravirt crap. The first few patches are taken from Waiman's latest series, but the virt support is completely new. Its primary aim is to not mess up the native code. I've not stress tested it, but the virt and paravirt (kvm) cases boot on simple smp guests. I've not done Xen, but the patch should be