search for: native_pte_clear

...gtable.h Signed-off-by: Zachary Amsden <zach@vmware.com> diff -r b3bbc1b5e085 include/asm-i386/pgtable-2level.h --- a/include/asm-i386/pgtable-2level.h Wed Apr 11 18:23:44 2007 -0700 +++ b/include/asm-i386/pgtable-2level.h Wed Apr 11 18:24:07 2007 -0700 @@ -39,16 +39,6 @@ static inline void native_pte_clear(stru static inline void native_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *xp) { *xp = __pte(0); -} - -/* local pte updates need not use xchg for locking */ -static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep) -{ - pte_t res; - - res = *ptep; - native_pte_clear(NULL,...

...gtable.h Signed-off-by: Zachary Amsden <zach@vmware.com> diff -r b3bbc1b5e085 include/asm-i386/pgtable-2level.h --- a/include/asm-i386/pgtable-2level.h Wed Apr 11 18:23:44 2007 -0700 +++ b/include/asm-i386/pgtable-2level.h Wed Apr 11 18:24:07 2007 -0700 @@ -39,16 +39,6 @@ static inline void native_pte_clear(stru static inline void native_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *xp) { *xp = __pte(0); -} - -/* local pte updates need not use xchg for locking */ -static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep) -{ - pte_t res; - - res = *ptep; - native_pte_clear(NULL,...

...he hypervisor for each pte_clear. Shadow mode hypervisors, such as VMI and lhype don't need to do the extra work of calling through paravirt-ops, and can just directly clear the page table entries without notifiying the hypervisor, since all the page tables are about to be freed. So introduce native_pte_clear functions which bypass any paravirt-ops notification. This results in a significant performance win for VMI and removes some indirect calls from zap_pte_range. Note the 3-level paging already had a native_pte_clear function, thus demanding argument conformance and extra args for the 2-level defin...

...he hypervisor for each pte_clear. Shadow mode hypervisors, such as VMI and lhype don't need to do the extra work of calling through paravirt-ops, and can just directly clear the page table entries without notifiying the hypervisor, since all the page tables are about to be freed. So introduce native_pte_clear functions which bypass any paravirt-ops notification. This results in a significant performance win for VMI and removes some indirect calls from zap_pte_range. Note the 3-level paging already had a native_pte_clear function, thus demanding argument conformance and extra args for the 2-level defin...

...zation. Signed-off-by: Zachary Amsden <zach@vmware.com> diff -r 47495b2532b3 include/asm-i386/pgtable-2level.h --- a/include/asm-i386/pgtable-2level.h Wed Apr 11 18:23:01 2007 -0700 +++ b/include/asm-i386/pgtable-2level.h Wed Apr 11 18:23:39 2007 -0700 @@ -41,10 +41,24 @@ static inline void native_pte_clear(stru *xp = __pte(0); } +/* local pte updates need not use xchg for locking */ +static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep) +{ + pte_t res; + + res = *ptep; + native_pte_clear(NULL, 0, ptep); + return res; +} + +#ifdef CONFIG_SMP static inline pte_t native_ptep_get_and_cle...

...zation. Signed-off-by: Zachary Amsden <zach@vmware.com> diff -r 47495b2532b3 include/asm-i386/pgtable-2level.h --- a/include/asm-i386/pgtable-2level.h Wed Apr 11 18:23:01 2007 -0700 +++ b/include/asm-i386/pgtable-2level.h Wed Apr 11 18:23:39 2007 -0700 @@ -41,10 +41,24 @@ static inline void native_pte_clear(stru *xp = __pte(0); } +/* local pte updates need not use xchg for locking */ +static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep) +{ + pte_t res; + + res = *ptep; + native_pte_clear(NULL, 0, ptep); + return res; +} + +#ifdef CONFIG_SMP static inline pte_t native_ptep_get_and_cle...

...return (pgd_t){ pgd }; +} + +pte_t native_ptep_get_and_clear(struct mm_struct *mm, u64 addr, + pte_t *ptep) +{ + return __pte(xchg(&(ptep)->pte, 0)); +} + +void native_set_pte_at(struct mm_struct *mm, u64 addr, pte_t *ptep, + pte_t pteval) +{ + native_set_pte(ptep,pteval); +} + +void native_pte_clear(struct mm_struct *mm, u64 addr, pte_t *ptep) +{ + native_set_pte_at(mm,addr,ptep,__pte(0)); +} + +void native_pmd_clear(pmd_t *pmd) +{ + native_set_pmd(pmd,__pmd(0)); +} + +void native_swapgs(unsigned long rip) +{ + asm volatile ("swapgs" :: :"memory" ); +} + +/* These are in en...

...return (pgd_t){ pgd }; +} + +pte_t native_ptep_get_and_clear(struct mm_struct *mm, u64 addr, + pte_t *ptep) +{ + return __pte(xchg(&(ptep)->pte, 0)); +} + +void native_set_pte_at(struct mm_struct *mm, u64 addr, pte_t *ptep, + pte_t pteval) +{ + native_set_pte(ptep,pteval); +} + +void native_pte_clear(struct mm_struct *mm, u64 addr, pte_t *ptep) +{ + native_set_pte_at(mm,addr,ptep,__pte(0)); +} + +void native_pmd_clear(pmd_t *pmd) +{ + native_set_pmd(pmd,__pmd(0)); +} + +void native_swapgs(unsigned long rip) +{ + asm volatile ("swapgs" :: :"memory" ); +} + +/* These are in en...

This series contain fixes to make the paravirt_ops code compile and boot on x86_64. This is a follow-up for the previous series from Glauber.

This series contain fixes to make the paravirt_ops code compile and boot on x86_64. This is a follow-up for the previous series from Glauber.

...pte_at, + .pv_mmu_ops.set_pmd = native_set_pmd, + + .pv_mmu_ops.ptep_modify_prot_start = __ptep_modify_prot_start, + .pv_mmu_ops.ptep_modify_prot_commit = __ptep_modify_prot_commit, #if CONFIG_PGTABLE_LEVELS >= 3 #ifdef CONFIG_X86_PAE - .set_pte_atomic = native_set_pte_atomic, - .pte_clear = native_pte_clear, - .pmd_clear = native_pmd_clear, + .pv_mmu_ops.set_pte_atomic = native_set_pte_atomic, + .pv_mmu_ops.pte_clear = native_pte_clear, + .pv_mmu_ops.pmd_clear = native_pmd_clear, #endif - .set_pud = native_set_pud, + .pv_mmu_ops.set_pud = native_set_pud, - .pmd_val = PTE_IDENT, - .make_pmd = PTE_ID...

...pmd_at(mm, addr, pmdp, pmd) -#define set_pud_at(mm, addr, pudp, pud) native_set_pud_at(mm, addr, pudp, pud) #define set_pte_atomic(ptep, pte) \ native_set_pte_atomic(ptep, pte) @@ -75,8 +73,6 @@ extern struct mm_struct *pgd_page_get_mm(struct page *page); #define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep) #define pmd_clear(pmd) native_pmd_clear(pmd) -#define pte_update(mm, addr, ptep) do { } while (0) - #define pgd_val(x) native_pgd_val(x) #define __pgd(x) native_make_pgd(x) @@ -965,31 +961,18 @@ static inline void native_set_pte_at(struct mm_struct *mm, unsigne...

...pmd_at(mm, addr, pmdp, pmd) -#define set_pud_at(mm, addr, pudp, pud) native_set_pud_at(mm, addr, pudp, pud) #define set_pte_atomic(ptep, pte) \ native_set_pte_atomic(ptep, pte) @@ -75,8 +73,6 @@ extern struct mm_struct *pgd_page_get_mm(struct page *page); #define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep) #define pmd_clear(pmd) native_pmd_clear(pmd) -#define pte_update(mm, addr, ptep) do { } while (0) - #define pgd_val(x) native_pgd_val(x) #define __pgd(x) native_make_pgd(x) @@ -965,31 +961,18 @@ static inline void native_set_pte_at(struct mm_struct *mm, unsigne...

Hey folks, This is the part-of-pvops-implementation-that-is-not-exactly-a-merge. Neat, uh? This is the majority of the work. The first patch in the series does not really belong here. It was already sent to lkml separetedly before, but I'm including it again, for a very simple reason: Try to test the paravirt patches without it, and you'll fail miserably ;-) (and it was not yet

Hey folks, This is the part-of-pvops-implementation-that-is-not-exactly-a-merge. Neat, uh? This is the majority of the work. The first patch in the series does not really belong here. It was already sent to lkml separetedly before, but I'm including it again, for a very simple reason: Try to test the paravirt patches without it, and you'll fail miserably ;-) (and it was not yet

Hi folks, With this series, the bulk of the work of pvops64 is done. Here, I integrate most of the paravirt.c and paravirt.h files, making them applicable to both architectures. CONFIG_PARAVIRT is _not_ present yet. Basically, this code is missing page table integration (patches currently being worked on by Jeremy). Enjoy

Hi folks, With this series, the bulk of the work of pvops64 is done. Here, I integrate most of the paravirt.c and paravirt.h files, making them applicable to both architectures. CONFIG_PARAVIRT is _not_ present yet. Basically, this code is missing page table integration (patches currently being worked on by Jeremy). Enjoy

...8 +366,11 @@ struct paravirt_patch_template pv_ops = { .mmu.ptep_modify_prot_start = __ptep_modify_prot_start, .mmu.ptep_modify_prot_commit = __ptep_modify_prot_commit, -#if CONFIG_PGTABLE_LEVELS >= 3 -#ifdef CONFIG_X86_PAE - .mmu.set_pte_atomic = native_set_pte_atomic, - .mmu.pte_clear = native_pte_clear, - .mmu.pmd_clear = native_pmd_clear, -#endif .mmu.set_pud = native_set_pud, .mmu.pmd_val = PTE_IDENT, .mmu.make_pmd = PTE_IDENT, -#if CONFIG_PGTABLE_LEVELS >= 4 .mmu.pud_val = PTE_IDENT, .mmu.make_pud = PTE_IDENT, @@ -398,8 +382,6 @@ struct paravirt_patch_template pv_ops =...

...8 +366,11 @@ struct paravirt_patch_template pv_ops = { .mmu.ptep_modify_prot_start = __ptep_modify_prot_start, .mmu.ptep_modify_prot_commit = __ptep_modify_prot_commit, -#if CONFIG_PGTABLE_LEVELS >= 3 -#ifdef CONFIG_X86_PAE - .mmu.set_pte_atomic = native_set_pte_atomic, - .mmu.pte_clear = native_pte_clear, - .mmu.pmd_clear = native_pmd_clear, -#endif .mmu.set_pud = native_set_pud, .mmu.pmd_val = PTE_IDENT, .mmu.make_pmd = PTE_IDENT, -#if CONFIG_PGTABLE_LEVELS >= 4 .mmu.pud_val = PTE_IDENT, .mmu.make_pud = PTE_IDENT, @@ -398,8 +382,6 @@ struct paravirt_patch_template pv_ops =...

...return (pgd_t){ pgd }; +} + +pte_t native_ptep_get_and_clear(struct mm_struct *mm, u64 addr, + pte_t *ptep) +{ + return __pte(xchg(&(ptep)->pte, 0)); +} + +void native_set_pte_at(struct mm_struct *mm, u64 addr, pte_t *ptep, + pte_t pteval) +{ + native_set_pte(ptep,pteval); +} + +void native_pte_clear(struct mm_struct *mm, u64 addr, pte_t *ptep) +{ + native_set_pte_at(mm,addr,ptep,__pte(0)); +} + +void native_pmd_clear(pmd_t *pmd) +{ + native_set_pmd(pmd,__pmd(0)); +} + +/* These are in entry.S */ +extern void native_iret(void); +extern void native_irq_enable_sysexit(void); + +static int __init...