Displaying 20 results from an estimated 35 matches for "native_irq_enable".
2017 Oct 25
0
[PATCH 03/13] x86/paravirt: Convert native patch assembly code strings to macros
...REG_ARG1
> +#define NATIVE_IDENTITY "mov " _REG_ARG1 ", " _REG_RET
> +#define NATIVE_SAVE_FL "pushf; pop " _REG_RET
> +#define NATIVE_RESTORE_FL "push " _REG_ARG1 "; popf"
> +#define NATIVE_IRQ_DISABLE "cli"
> +#define NATIVE_IRQ_ENABLE "sti"
> +#define NATIVE_READ_CR2 "mov %cr2, " _REG_RET
> +#define NATIVE_READ_CR3 "mov %cr3, " _REG_RET
> +#define NATIVE_WRITE_CR3 "mov " _REG_ARG1 ", %cr3"
> +#define NATIVE_FLUSH_TLB_SINGLE "invlpg (" _REG_ARG1 "...
2017 Oct 04
1
[PATCH 03/13] x86/paravirt: Convert native patch assembly code strings to macros
...REG_ARG1 ", " _REG_ARG1
+#define NATIVE_IDENTITY "mov " _REG_ARG1 ", " _REG_RET
+#define NATIVE_SAVE_FL "pushf; pop " _REG_RET
+#define NATIVE_RESTORE_FL "push " _REG_ARG1 "; popf"
+#define NATIVE_IRQ_DISABLE "cli"
+#define NATIVE_IRQ_ENABLE "sti"
+#define NATIVE_READ_CR2 "mov %cr2, " _REG_RET
+#define NATIVE_READ_CR3 "mov %cr3, " _REG_RET
+#define NATIVE_WRITE_CR3 "mov " _REG_ARG1 ", %cr3"
+#define NATIVE_FLUSH_TLB_SINGLE "invlpg (" _REG_ARG1 ")"
+#define NAT...
2007 Oct 31
3
[PATCH 0/7] (Re-)introducing pvops for x86_64 - Consolidation part
Hi folks,
Here is the result of the latest work on the pvops front, after the x86
arch merge. From the functionality point of view, almost nothing was
changed, except for proper vsmp support - which was discussed, but not
implemented before - and the introduction of smp_ops in x86_64, which eased
the merging of the smp header.
Speaking of the merge, a significant part (although not majority) of
2007 Oct 31
3
[PATCH 0/7] (Re-)introducing pvops for x86_64 - Consolidation part
Hi folks,
Here is the result of the latest work on the pvops front, after the x86
arch merge. From the functionality point of view, almost nothing was
changed, except for proper vsmp support - which was discussed, but not
implemented before - and the introduction of smp_ops in x86_64, which eased
the merging of the smp header.
Speaking of the merge, a significant part (although not majority) of
2023 Mar 17
0
[PATCH v2] x86/paravirt: convert simple paravirt functions to asm
...void paravirt_flush_lazy_mmu(void);
void _paravirt_nop(void);
void paravirt_BUG(void);
-u64 _paravirt_ident_64(u64);
unsigned long paravirt_ret0(void);
+#ifdef CONFIG_PARAVIRT_XXL
+u64 _paravirt_ident_64(u64);
+unsigned long pv_native_save_fl(void);
+void pv_native_irq_disable(void);
+void pv_native_irq_enable(void);
+unsigned long pv_native_read_cr2(void);
+#endif
#define paravirt_nop ((void *)_paravirt_nop)
diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c
index 42e182868873..5ec2071570a4 100644
--- a/arch/x86/kernel/paravirt.c
+++ b/arch/x86/kernel/paravirt.c
@@ -64,11 +64,11 @...
2017 Oct 04
0
[PATCH 04/13] x86/paravirt: Convert DEF_NATIVE macro to GCC extended asm syntax
...#define NATIVE_ZERO "xor " _REG_ARG1 ", " _REG_ARG1
#define NATIVE_IDENTITY "mov " _REG_ARG1 ", " _REG_RET
@@ -22,9 +22,9 @@
#define NATIVE_RESTORE_FL "push " _REG_ARG1 "; popf"
#define NATIVE_IRQ_DISABLE "cli"
#define NATIVE_IRQ_ENABLE "sti"
-#define NATIVE_READ_CR2 "mov %cr2, " _REG_RET
-#define NATIVE_READ_CR3 "mov %cr3, " _REG_RET
-#define NATIVE_WRITE_CR3 "mov " _REG_ARG1 ", %cr3"
+#define NATIVE_READ_CR2 "mov %%cr2, " _REG_RET
+#define NATIVE_READ_CR3 &quo...
2017 Oct 04
31
[PATCH 00/13] x86/paravirt: Make pv ops code generation more closely match reality
This changes the pv ops code generation to more closely match reality.
For example, instead of:
callq *0xffffffff81e3a400 (pv_irq_ops.save_fl)
vmlinux will now show:
pushfq
pop %rax
nop
nop
nop
nop
nop
which is what the runtime version of the code will show in most cases.
This idea was suggested by Andy Lutomirski.
The benefits are:
- For the most common runtime cases
2017 Oct 04
31
[PATCH 00/13] x86/paravirt: Make pv ops code generation more closely match reality
This changes the pv ops code generation to more closely match reality.
For example, instead of:
callq *0xffffffff81e3a400 (pv_irq_ops.save_fl)
vmlinux will now show:
pushfq
pop %rax
nop
nop
nop
nop
nop
which is what the runtime version of the code will show in most cases.
This idea was suggested by Andy Lutomirski.
The benefits are:
- For the most common runtime cases
2020 Aug 11
0
[PATCH] x86/paravirt: Add missing noinstr to arch_local*() helpers
...---
3 files changed, 18 insertions(+), 18 deletions(-)
diff --git a/arch/x86/include/asm/irqflags.h b/arch/x86/include/asm/irqflags.h
index 02a0cf547d7b..7c614db25274 100644
--- a/arch/x86/include/asm/irqflags.h
+++ b/arch/x86/include/asm/irqflags.h
@@ -54,13 +54,13 @@ static __always_inline void native_irq_enable(void)
asm volatile("sti": : :"memory");
}
-static inline __cpuidle void native_safe_halt(void)
+static __always_inline __cpuidle void native_safe_halt(void)
{
mds_idle_clear_cpu_buffers();
asm volatile("sti; hlt": : :"memory");
}
-static inline __c...
2023 Mar 08
3
[PATCH] x86/paravirt: convert simple paravirt functions to asm
...void paravirt_flush_lazy_mmu(void);
void _paravirt_nop(void);
void paravirt_BUG(void);
-u64 _paravirt_ident_64(u64);
unsigned long paravirt_ret0(void);
+#ifdef CONFIG_PARAVIRT_XXL
+u64 _paravirt_ident_64(u64);
+unsigned long pv_native_save_fl(void);
+void pv_native_irq_disable(void);
+void pv_native_irq_enable(void);
+unsigned long pv_native_read_cr2(void);
+#endif
#define paravirt_nop ((void *)_paravirt_nop)
diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c
index 42e182868873..d25ac4b08c41 100644
--- a/arch/x86/kernel/paravirt.c
+++ b/arch/x86/kernel/paravirt.c
@@ -64,11 +64,11 @...
2018 Aug 10
0
[PATCH 04/10] x86/paravirt: use a single ops structure
...sched_clock,
- .steal_clock = native_steal_clock,
-};
-
-__visible struct pv_irq_ops pv_irq_ops = {
- .save_fl = __PV_IS_CALLEE_SAVE(native_save_fl),
- .restore_fl = __PV_IS_CALLEE_SAVE(native_restore_fl),
- .irq_disable = __PV_IS_CALLEE_SAVE(native_irq_disable),
- .irq_enable = __PV_IS_CALLEE_SAVE(native_irq_enable),
- .safe_halt = native_safe_halt,
- .halt = native_halt,
-};
-
-__visible struct pv_cpu_ops pv_cpu_ops = {
- .cpuid = native_cpuid,
- .get_debugreg = native_get_debugreg,
- .set_debugreg = native_set_debugreg,
- .read_cr0 = native_read_cr0,
- .write_cr0 = native_write_cr0,
- .write_cr4 = native_wr...
2007 Apr 18
0
[RFC/PATCH PV_OPS X86_64 01/17] paravirt_ops - core changes
...void native_restore_fl(unsigned long f)
+{
+ asm volatile("pushq %0 ; popfq": /* no output */
+ :"g" (f)
+ :"memory", "cc");
+}
+
+static void native_irq_disable(void)
+{
+ asm volatile("cli": : :"memory");
+}
+
+static void native_irq_enable(void)
+{
+ asm volatile("sti": : :"memory");
+}
+
+static void native_safe_halt(void)
+{
+ asm volatile("sti; hlt": : :"memory");
+}
+
+static void native_halt(void)
+{
+ asm volatile("hlt": : :"memory");
+}
+
+static u64 native_read_tsc(v...
2007 Apr 18
0
[RFC/PATCH PV_OPS X86_64 01/17] paravirt_ops - core changes
...void native_restore_fl(unsigned long f)
+{
+ asm volatile("pushq %0 ; popfq": /* no output */
+ :"g" (f)
+ :"memory", "cc");
+}
+
+static void native_irq_disable(void)
+{
+ asm volatile("cli": : :"memory");
+}
+
+static void native_irq_enable(void)
+{
+ asm volatile("sti": : :"memory");
+}
+
+static void native_safe_halt(void)
+{
+ asm volatile("sti; hlt": : :"memory");
+}
+
+static void native_halt(void)
+{
+ asm volatile("hlt": : :"memory");
+}
+
+static u64 native_read_tsc(v...
2007 Sep 28
2
[PATCH RFC] paravirt_ops: refactor struct paravirt_ops into smaller pv_*_ops
...* Otherwise call the function; assume target could
clobber any caller-save reg */
@@ -205,7 +197,7 @@ unsigned paravirt_patch_insns(void *insn
void init_IRQ(void)
{
- paravirt_ops.init_IRQ();
+ pv_irq_ops.init_IRQ();
}
static void native_flush_tlb(void)
@@ -233,7 +225,7 @@ extern void native_irq_enable_sysexit(vo
static int __init print_banner(void)
{
- paravirt_ops.banner();
+ pv_init_ops.banner();
return 0;
}
core_initcall(print_banner);
@@ -274,119 +266,167 @@ int paravirt_disable_iospace(void)
}
struct paravirt_ops paravirt_ops = {
- .name = "bare hardware",
- .paravirt_...
2007 Sep 28
2
[PATCH RFC] paravirt_ops: refactor struct paravirt_ops into smaller pv_*_ops
...* Otherwise call the function; assume target could
clobber any caller-save reg */
@@ -205,7 +197,7 @@ unsigned paravirt_patch_insns(void *insn
void init_IRQ(void)
{
- paravirt_ops.init_IRQ();
+ pv_irq_ops.init_IRQ();
}
static void native_flush_tlb(void)
@@ -233,7 +225,7 @@ extern void native_irq_enable_sysexit(vo
static int __init print_banner(void)
{
- paravirt_ops.banner();
+ pv_init_ops.banner();
return 0;
}
core_initcall(print_banner);
@@ -274,119 +266,167 @@ int paravirt_disable_iospace(void)
}
struct paravirt_ops paravirt_ops = {
- .name = "bare hardware",
- .paravirt_...
2007 Dec 20
6
[PATCH 0/15] adjust pvops to accomodate its x86_64 variant
Hi folks,
With this series, the bulk of the work of pvops64 is done.
Here, I integrate most of the paravirt.c and paravirt.h files, making
them applicable to both architectures.
CONFIG_PARAVIRT is _not_ present yet. Basically, this code is missing page
table integration (patches currently being worked on by Jeremy).
Enjoy
2007 Dec 20
6
[PATCH 0/15] adjust pvops to accomodate its x86_64 variant
Hi folks,
With this series, the bulk of the work of pvops64 is done.
Here, I integrate most of the paravirt.c and paravirt.h files, making
them applicable to both architectures.
CONFIG_PARAVIRT is _not_ present yet. Basically, this code is missing page
table integration (patches currently being worked on by Jeremy).
Enjoy
2007 Oct 09
2
[PATCH RFC REPOST 1/2] paravirt: refactor struct paravirt_ops into smaller pv_*_ops
...* Otherwise call the function; assume target could
clobber any caller-save reg */
@@ -205,7 +199,7 @@ unsigned paravirt_patch_insns(void *insn
void init_IRQ(void)
{
- paravirt_ops.init_IRQ();
+ pv_irq_ops.init_IRQ();
}
static void native_flush_tlb(void)
@@ -233,7 +227,7 @@ extern void native_irq_enable_sysexit(vo
static int __init print_banner(void)
{
- paravirt_ops.banner();
+ pv_init_ops.banner();
return 0;
}
core_initcall(print_banner);
@@ -274,119 +268,167 @@ int paravirt_disable_iospace(void)
}
struct paravirt_ops paravirt_ops = {
- .name = "bare hardware",
- .paravirt_...
2007 Oct 09
2
[PATCH RFC REPOST 1/2] paravirt: refactor struct paravirt_ops into smaller pv_*_ops
...* Otherwise call the function; assume target could
clobber any caller-save reg */
@@ -205,7 +199,7 @@ unsigned paravirt_patch_insns(void *insn
void init_IRQ(void)
{
- paravirt_ops.init_IRQ();
+ pv_irq_ops.init_IRQ();
}
static void native_flush_tlb(void)
@@ -233,7 +227,7 @@ extern void native_irq_enable_sysexit(vo
static int __init print_banner(void)
{
- paravirt_ops.banner();
+ pv_init_ops.banner();
return 0;
}
core_initcall(print_banner);
@@ -274,119 +268,167 @@ int paravirt_disable_iospace(void)
}
struct paravirt_ops paravirt_ops = {
- .name = "bare hardware",
- .paravirt_...
2018 Aug 10
13
[PATCH 00/10] x86/paravirt: several cleanups
This series removes some no longer needed stuff from paravirt
infrastructure and puts large quantities of paravirt ops under a new
config option PARAVIRT_XXL which is selected by XEN_PV only.
A pvops kernel without XEN_PV being configured is about 2.5% smaller
with this series applied.
tip commit 5800dc5c19f34e6e03b5adab1282535cb102fafd ("x86/paravirt:
Fix spectre-v2 mitigations for