search for: native_flush_tlb_one

Here is an slightly updated version of the paravirt_ops patch. If your comments and criticism were welcome before, now it's even more! There are some issues that are _not_ addressed in this revision, and here are the causes: * split debugreg into multiple functions, suggested by Andi: - Me and jsfg agree that introducing more pvops (specially 14!) is not worthwhile. So, although we do

Here is an slightly updated version of the paravirt_ops patch. If your comments and criticism were welcome before, now it's even more! There are some issues that are _not_ addressed in this revision, and here are the causes: * split debugreg into multiple functions, suggested by Andi: - Me and jsfg agree that introducing more pvops (specially 14!) is not worthwhile. So, although we do

This is hopefully the last iteration of the pvops64 patch. >From the last version, we have only one change, which is include/asm-x86_64/processor.h: There were still one survivor in raw asm. Also, git screwed me up for some reason, and the 25th patch was missing the new files, paravirt.{c,h}. (although I do remember having git-add'ed it, but who knows...) Andrew, could you please push it

This is hopefully the last iteration of the pvops64 patch. >From the last version, we have only one change, which is include/asm-x86_64/processor.h: There were still one survivor in raw asm. Also, git screwed me up for some reason, and the 25th patch was missing the new files, paravirt.{c,h}. (although I do remember having git-add'ed it, but who knows...) Andrew, could you please push it

Hi folks, After some time away from it, and a big rebase as a consequence, here is the updated version of paravirt_ops for x86_64, heading to inclusion. Your criticism is of course, very welcome. Have fun -- arch/x86_64/Kconfig | 11 arch/x86_64/ia32/syscall32.c | 2 arch/x86_64/kernel/Makefile | 1 arch/x86_64/kernel/apic.c | 2

Hi folks, After some time away from it, and a big rebase as a consequence, here is the updated version of paravirt_ops for x86_64, heading to inclusion. Your criticism is of course, very welcome. Have fun -- arch/x86_64/Kconfig | 11 arch/x86_64/ia32/syscall32.c | 2 arch/x86_64/kernel/Makefile | 1 arch/x86_64/kernel/apic.c | 2

...+} + + +static void native_flush_tlb(void) +{ + __native_flush_tlb(); +} + +/* + * Global pages have to be flushed a bit differently. Not a real + * performance problem because this does not happen often. + */ +static void native_flush_tlb_all(void) +{ + __native_flush_tlb_all(); +} + +static void native_flush_tlb_one(u64 addr) +{ + __native_flush_tlb_one(addr); +} + +pte_t native_make_pte(unsigned long pte) +{ + return (pte_t){ pte }; +} + +pud_t native_make_pud(unsigned long pud) +{ + return (pud_t){ pud }; +} + +pmd_t native_make_pmd(unsigned long pmd) +{ + return (pmd_t){ pmd }; +} + +pgd_t native_make_pgd(u...

...+} + + +static void native_flush_tlb(void) +{ + __native_flush_tlb(); +} + +/* + * Global pages have to be flushed a bit differently. Not a real + * performance problem because this does not happen often. + */ +static void native_flush_tlb_all(void) +{ + __native_flush_tlb_all(); +} + +static void native_flush_tlb_one(u64 addr) +{ + __native_flush_tlb_one(addr); +} + +pte_t native_make_pte(unsigned long pte) +{ + return (pte_t){ pte }; +} + +pud_t native_make_pud(unsigned long pud) +{ + return (pud_t){ pud }; +} + +pmd_t native_make_pmd(unsigned long pmd) +{ + return (pmd_t){ pmd }; +} + +pgd_t native_make_pgd(u...

..."); } -static inline void __flush_tlb_all(void) +static inline void __native_flush_tlb_all(void) { unsigned long cr4 = get_cr4(); set_cr4(cr4 & ~X86_CR4_PGE); /* clear PGE */ set_cr4(cr4); /* write old PGE again and flush TLBs */ } -#define __flush_tlb_one(addr) \ +#define __native_flush_tlb_one(addr) \ __asm__ __volatile__("invlpg (%0)" :: "r" (addr) : "memory") +#ifdef CONFIG_PARAVIRT +#include <asm/paravirt.h> +#else +#define __flush_tlb __native_flush_tlb +#define __flush_tlb_one __native_flush_tlb_one +#define __flush_tlb_all __native_flush_tl...

..."); } -static inline void __flush_tlb_all(void) +static inline void __native_flush_tlb_all(void) { unsigned long cr4 = get_cr4(); set_cr4(cr4 & ~X86_CR4_PGE); /* clear PGE */ set_cr4(cr4); /* write old PGE again and flush TLBs */ } -#define __flush_tlb_one(addr) \ +#define __native_flush_tlb_one(addr) \ __asm__ __volatile__("invlpg (%0)" :: "r" (addr) : "memory") +#ifdef CONFIG_PARAVIRT +#include <asm/paravirt.h> +#else +#define __flush_tlb __native_flush_tlb +#define __flush_tlb_one __native_flush_tlb_one +#define __flush_tlb_all __native_flush_tl...