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...d\bin\Debug\test.bc 1. Running pass 'Function Pass Manager' on module 'C:\Users\DaAn\Documents\Projects\llvm-3.4\build\bin\Debug\test.bc'. 2. Running pass 'Greedy Register Allocator' on function '@_Z5test2v' <http://llvm.1065342.n5.nabble.com/file/n65821/dag._Z5test2v-4ac530.png> <http://llvm.1065342.n5.nabble.com/file/n65821/dag._Z5test3v-e16193.png> -- View this message in context: http://llvm.1065342.n5.nabble.com/selecting-ISD-node-help-tp65819p65821.html Sent from the LLVM - Dev mailing list archive at Nabble.com.

Hey, I wanted to add an intrinsics to read MSRs. So I added the intrinsics and lowered it to a new ISD node I created ISD::RDMSR, its first operand is the MSR id. I added a case in X86DAGToDAGISel::Select for ISD::RDMSR. Now I know rdmsr works like so: mov r/ecx, <id> rdmsr r/eax holds the lower 32/64 bit >From what I understood this needs a Token Factor node, nodes which are