Displaying 4 results from an estimated 4 matches for "mybaseinstrclass".
2012 Mar 07
0
[LLVMdev] Data/Address registers
...re not being used for something else than basic arithmetics (like comparisons which are not supported for address regs). Is it still possible to get ride of this with register classes ?
It should be, yes. For a contrived example of a simple add-immediate instruction for each:
def ADD_address_reg: myBaseInstrClass<(outs ADDR_REG:$dst), (ins ADDR_REG:$src, i32imm:$imm), [(set ADDR_REG:$dst, (add ADDR_REG:$dst, i32imm:$imm)]>;
def ADD_general_reg: myBaseInstrClass<(outs GPR:$dst), (ins GPR:$src, i32imm:$imm), [(set GPR:$dst, (add GPR:$dst, i32imm:$imm)]>;
Likewise, other operations that can targe...
2012 Mar 07
2
[LLVMdev] Data/Address registers
Hi Jim,
Thanks for your response.
Le 06/03/2012 22:54, Jim Grosbach a écrit :
> Hi Ivan,
> On Mar 3, 2012, at 4:48 AM, Ivan Llopard<ivanllopard at gmail.com> wrote:
>
>> Hi,
>>
>> I'm facing a problem in llvm while porting it to a new target and I'll
>> need some support.
>> We have 2 kind of register, one for general purposes (i.e.
2012 Mar 14
2
[LLVMdev] Data/Address registers
...used for something else than basic arithmetics (like comparisons which are not supported for address regs). Is it still possible to get ride of this with register classes ?
> It should be, yes. For a contrived example of a simple add-immediate instruction for each:
>
> def ADD_address_reg: myBaseInstrClass<(outs ADDR_REG:$dst), (ins ADDR_REG:$src, i32imm:$imm), [(set ADDR_REG:$dst, (add ADDR_REG:$dst, i32imm:$imm)]>;
> def ADD_general_reg: myBaseInstrClass<(outs GPR:$dst), (ins GPR:$src, i32imm:$imm), [(set GPR:$dst, (add GPR:$dst, i32imm:$imm)]>;
>
> Likewise, other operations...
2012 Mar 14
0
[LLVMdev] Data/Address registers
...thing else than basic arithmetics (like comparisons which are not supported for address regs). Is it still possible to get ride of this with register classes ?
>> It should be, yes. For a contrived example of a simple add-immediate instruction for each:
>>
>> def ADD_address_reg: myBaseInstrClass<(outs ADDR_REG:$dst), (ins ADDR_REG:$src, i32imm:$imm), [(set ADDR_REG:$dst, (add ADDR_REG:$dst, i32imm:$imm)]>;
>> def ADD_general_reg: myBaseInstrClass<(outs GPR:$dst), (ins GPR:$src, i32imm:$imm), [(set GPR:$dst, (add GPR:$dst, i32imm:$imm)]>;
>>
>> Likewise, othe...