search for: mul26

Displaying 11 results from an estimated 11 matches for "mul26".

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2016 Mar 05
2
[AMDGPU] non-hsa intrinsic with hsa target
...rinsics starting with llvm.amdgcn, while it still uses llvm.r600.read.local.size.x(). The output LLVM IR code is like: define void @g(float addrspace(1)* nocapture %array) #0 { %x.i.i = tail call i32 @llvm.amdgcn.workgroup.id.x() #2 %x.i12.i = tail call i32 @llvm.r600.read.local.size.x() #1 %mul26.i = mul i32 %x.i12.i, %x.i.i %x.i4.i = tail call i32 @llvm.amdgcn.workitem.id.x() #2, !range !7 %add.i = add i32 %x.i4.i, %mul26.i %0 = sext i32 %add.i to i64 %arrayidx = getelementptr inbounds float, float addrspace(1)* %array, i64 %0 store float 1.000000e+00, float addrspace(1)* %arrayi...
2016 Mar 05
2
[AMDGPU] non-hsa intrinsic with hsa target
...oup_id.exit.thread i32 1, label %get_group_id.exit.thread22 i32 2, label %get_group_id.exit.thread24 ] get_group_id.exit.thread: ; preds = %entry %x.i = tail call i32 @llvm.amdgcn.workgroup.id.x() #13 %x.i12 = tail call i32 @llvm.r600.read.local.size.x() #3 %mul26 = mul i32 %x.i12, %x.i %x.i4 = tail call i32 @llvm.amdgcn.workitem.id.x() #13, !range !1 br label %get_local_id.exit ... } So it shows that some intrinstics are still using llvm.r600.xxx. I have no idea if I ever missed something so that it doesn't work. Thanks. Best regards, 李弘宇 (Li, H...
2011 Jul 17
0
[LLVMdev] Trying to optimize out store/load pair
...p50 to i32 %sub.i183 = add nsw i32 %conv, -128 %sub6.i184 = add nsw i32 %conv51, -128 %tmp.i185 = mul i32 %conv44, 298 %mul17.i186 = mul nsw i32 %sub6.i184, 459 %add18.i187 = add i32 %tmp.i185, -4640 %add19.i188 = add i32 %mul17.i186, %add18.i187 %shr.i189 = ashr i32 %add19.i188, 8 %mul26.i190 = mul nsw i32 %sub.i183, -55 %mul30.i191 = mul nsw i32 %sub6.i184, -136 %add31.i192 = add i32 %add18.i187, %mul26.i190 %add32.i193 = add i32 %add31.i192, %mul30.i191 %shr33.i194 = ashr i32 %add32.i193, 8 %mul40.i195 = mul nsw i32 %sub.i183, 541 %add46.i196 = add i32 %add18.i187, %m...
2011 Jul 17
0
[LLVMdev] Trying to optimize out store/load pair
...t i8 %tmp50 to i32 %sub.i183 = add nsw i32 %conv, -128 %sub6.i184 = add nsw i32 %conv51, -128 %tmp.i185 = mul i32 %conv44, 298 %mul17.i186 = mul nsw i32 %sub6.i184, 459 %add18.i187 = add i32 %tmp.i185, -4640 %add19.i188 = add i32 %mul17.i186, %add18.i187 %shr.i189 = ashr i32 %add19.i188, 8 %mul26.i190 = mul nsw i32 %sub.i183, -55 %mul30.i191 = mul nsw i32 %sub6.i184, -136 %add31.i192 = add i32 %add18.i187, %mul26.i190 %add32.i193 = add i32 %add31.i192, %mul30.i191 %shr33.i194 = ashr i32 %add32.i193, 8 %mul40.i195 = mul nsw i32 %sub.i183, 541 %add46.i196 = add i32 %add18.i187, %mul40.i...
2015 Jan 15
3
[LLVMdev] question about enabling cfl-aa and collecting a57 numbers
On Thu, Jan 15, 2015 at 1:26 PM, Nick Lewycky <nlewycky at google.com> wrote: > On 15 January 2015 at 13:10, Daniel Berlin <dberlin at dberlin.org> wrote: > >> Yes. >> I've attached an updated patch that does the following: >> >> 1. Fixes the partialalias of globals/arguments >> 2. Enables partialalias for cases where nothing has been unified to
2015 Jan 26
0
[LLVMdev] question about enabling cfl-aa and collecting a57 numbers
Inline George > On Jan 26, 2015, at 1:05 PM, Daniel Berlin <dberlin at dberlin.org> wrote: > > George, given that, can you just build constexpr handling (it's not as easy as you think) as a separate funciton and have it use it in the right places? Will do. :) > FWIW, my current list of CFLAA issues is: > > 1. Unknown values (results from ptrtoint, incoming
2015 Jan 26
2
[LLVMdev] question about enabling cfl-aa and collecting a57 numbers
George, given that, can you just build constexpr handling (it's not as easy as you think) as a separate funciton and have it use it in the right places? FWIW, my current list of CFLAA issues is: 1. Unknown values (results from ptrtoint, incoming pointers, etc) are not treated as unknown. These should be done through graph edge (so that they can be one way, otherwise, you will unify
2015 Jan 14
4
[LLVMdev] question about enabling cfl-aa and collecting a57 numbers
Inline - George > On Jan 14, 2015, at 10:49 AM, Daniel Berlin <dberlin at dberlin.org> wrote: > > > >> On Tue, Jan 13, 2015 at 11:26 PM, Nick Lewycky <nlewycky at google.com> wrote: >>> On 13 January 2015 at 22:11, Daniel Berlin <dberlin at dberlin.org> wrote: >>> This is caused by CFLAA returning PartialAlias for a query that BasicAA can
2015 Jan 30
2
[LLVMdev] question about enabling cfl-aa and collecting a57 numbers
...uble* %Index +define void @testr2(double* nocapture readonly %A, double* nocapture readonly %Index) { +entry: + %arrayidx22 = getelementptr inbounds double* %Index, i64 2 + %0 = load double* %arrayidx22 + %arrayidx25 = getelementptr inbounds double* %A, i64 2 + %1 = load double* %arrayidx25 + %mul26 = fmul double %0, %1 + ret void +} diff --git a/test/Analysis/CFLAliasAnalysis/stratified-attrs-indexing.ll b/test/Analysis/CFLAliasAnalysis/stratified-attrs-indexing.ll index 8afedf2..3475285 100644 --- a/test/Analysis/CFLAliasAnalysis/stratified-attrs-indexing.ll +++ b/test/Analysis/CFLAliasAnal...
2015 Jan 15
2
[LLVMdev] question about enabling cfl-aa and collecting a57 numbers
...* %A, double* %Index +define void @testr2(double* nocapture readonly %A, double* nocapture readonly %Index) { + %arrayidx22 = getelementptr inbounds double* %Index, i64 2 + %1 = load double* %arrayidx22 + %arrayidx25 = getelementptr inbounds double* %A, i64 2 + %2 = load double* %arrayidx25 + %mul26 = fmul double %1, %2 + ret void +} +
2015 Jan 14
3
[LLVMdev] question about enabling cfl-aa and collecting a57 numbers
Oh, sorry, i didn't rebase it when i changed the fix, you would have had to apply the first on top of the second. Here is one against HEAD On Wed, Jan 14, 2015 at 12:32 PM, Ana Pazos <apazos at codeaurora.org> wrote: > Daniel, your patch does not apply cleanly. Are you on the tip? > > The code I see there is no line if (QueryResult == MayAlias|| QueryResult == PartialAlias)