Displaying 6 results from an estimated 6 matches for "mul17".
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2013 Oct 19
2
[LLVMdev] Name of Virtual Registers
How can I get the name of the virtual Registers present on an instruction.
eg. %add18 = add nsw i32 %mul17, %37
in this case I want to extract the name of the virutal registers as "add18",
"mul17","37".
This can easily be done in the case of store Instruction
eg. store i32 %add20, i32* %t, align 4
in this case functions like instr->getOperand(0)->getName() and
in...
2013 Oct 21
0
[LLVMdev] How to fix the operand references of cloned instruction
...ting an error as
"Instruction does not dominate all uses!".
example:-
original function and block:-
%a = alloca i32, align 4
%x = alloca i32, align 4
%y = alloca i32, align 4
%35 = load i32* %x, align 4
%36 = load i32* %y, align 4
%37 = load i32* %a, align 4
%mul17 = mul nsw i32 %35, %36
%add18 = add nsw i32 %mul17, %37
When cloned in a newly created basic block of newly created funtion :-
%0 = alloca i32, align 4
%1 = load i32* %a, align 4
%2 = alloca i32, align 4
%3 = load i32* %y, align 4
%4 = alloca i32, align 4
%5 = load i32*...
2012 Jul 15
0
[LLVMdev] Issue with Machine Verifier and earlyclobber
..., %mul9
%add11 = fadd float %add, %add10
%mul12 = fmul float %days, 0x3E13C5B640000000
%sub13 = fsub float 0x3F911C1180000000, %mul12
%mul14 = fmul float %add, 2.000000e+00
%call15 = tail call float @dsin(float %mul14) nounwind readnone
%mul16 = fmul float %call15, 0x3FF1F736C0000000
%mul17 = fmul float %sub13, 2.000000e+00
%mul19 = fmul float %mul17, %call
%sub20 = fsub float %mul16, %mul19
%mul21 = fmul float %sub13, 4.000000e+00
%mul22 = fmul float %mul21, 0x3FF1F736C0000000
%mul24 = fmul float %mul22, %call
%call26 = tail call float @dcos(float %mul14) nounwind readnon...
2012 Jul 15
2
[LLVMdev] Issue with Machine Verifier and earlyclobber
On Jul 15, 2012, at 9:20 AM, Borja Ferrer <borja.ferav at gmail.com> wrote:
> Jakob, one more hint, I've placed some asserts around the code you added and noticed that the InlineSpiller::insertReload() function is not being called.
>
> 2012/7/14 Borja Ferrer <borja.ferav at gmail.com>
> Hello Jakob,
>
> I'm still getting the error, I can give you any other
2011 Jul 17
0
[LLVMdev] Trying to optimize out store/load pair
...tmp37 to i32
%tmp43 = load i8* %arrayidx42, align 1, !tbaa !0
%conv44 = zext i8 %tmp43 to i32
%tmp50 = load i8* %arrayidx49, align 1, !tbaa !0
%conv51 = zext i8 %tmp50 to i32
%sub.i183 = add nsw i32 %conv, -128
%sub6.i184 = add nsw i32 %conv51, -128
%tmp.i185 = mul i32 %conv44, 298
%mul17.i186 = mul nsw i32 %sub6.i184, 459
%add18.i187 = add i32 %tmp.i185, -4640
%add19.i188 = add i32 %mul17.i186, %add18.i187
%shr.i189 = ashr i32 %add19.i188, 8
%mul26.i190 = mul nsw i32 %sub.i183, -55
%mul30.i191 = mul nsw i32 %sub6.i184, -136
%add31.i192 = add i32 %add18.i187, %mul26.i190...
2011 Jul 17
0
[LLVMdev] Trying to optimize out store/load pair
...ext i8 %tmp37 to i32
%tmp43 = load i8* %arrayidx42, align 1, !tbaa !0
%conv44 = zext i8 %tmp43 to i32
%tmp50 = load i8* %arrayidx49, align 1, !tbaa !0
%conv51 = zext i8 %tmp50 to i32
%sub.i183 = add nsw i32 %conv, -128
%sub6.i184 = add nsw i32 %conv51, -128
%tmp.i185 = mul i32 %conv44, 298
%mul17.i186 = mul nsw i32 %sub6.i184, 459
%add18.i187 = add i32 %tmp.i185, -4640
%add19.i188 = add i32 %mul17.i186, %add18.i187
%shr.i189 = ashr i32 %add19.i188, 8
%mul26.i190 = mul nsw i32 %sub.i183, -55
%mul30.i191 = mul nsw i32 %sub6.i184, -136
%add31.i192 = add i32 %add18.i187, %mul26.i190
%add...