search for: mtriple

Displaying 20 results from an estimated 283 matches for "mtriple".

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2013 Jan 21
1
[LLVMdev] [llvm-commits] [llvm] r172534 - /llvm/trunk/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll
...Trick <atrick at apple.com> wrote: >> Moving to llvmdev... >> >> On Jan 21, 2013, at 11:37 AM, Nadav Rotem <nrotem at apple.com> wrote: >> >> > Hi Manish, >> > >> > Thank you for looking at this. Recently opt started using the "-mtriple" command line flag to initialize the TargetMachine for IR-level transformations that use it. Currently only the following passes are using this feature: LSR, LowerSwitch, BBVectorizer and LoopVectorizer. If you look at the tests in LoopVectorize you will see that the target-dependent tests are...
2017 Sep 15
3
LLVM mtriple for aarch64-win32-msvc ?
Is there a way to use LLC to cross-compile some code to run on Windows IOT on Raspberry Pi ? I was able to convince LLVM to spit out some bitcode for this, but when I try llc it dumps: llc.exe test.bc -o test.obj -filetype=obj -O3 -mtriple=aarch64-win32-msvc -mcpu=cortex-a53 Wrote crash dump file "C:\Users\clovett\AppData\Local\Temp\llc.exe-4990d8.dmp" 0x0000000000000000 (0x0000000000000000 0x000001AE351C38E9 0x0000000000000007 0x000001AE351C38F1) <unknown module> 0x00007FF79681B7F5 (0x000001AE3526BFE0 0x000001AE35216...
2017 Sep 16
3
LLVM mtriple for aarch64-win32-msvc ?
...hat's how my bitcode is generated then using LLC to cross-compile that. So using armv7-win32-msvc is getting me a bit closer, but what CPU, raspberry pi 3 is running a Cortext-A53, but when I specify that in -mcpu argument I get this error: > llc.exe test.bc -o test.obj -filetype=obj -O3 -mtriple=armv7-win32-msvc -mcpu=cortex-a53 -relocation-model=pic > llc.exe failed: LLVM ERROR: CPU: 'cortex-a53' does not support ARM mode execution! On Fri, Sep 15, 2017 at 2:20 PM, Martin Storsjö <martin at martin.st> wrote: > On Fri, 15 Sep 2017, Chris Lovett via llvm-dev wrote: &g...
2010 Nov 23
2
[LLVMdev] LLVM unit and regression tests, enabled targets and conditions
...; or ; REQUIRE: <condition> 0 or many could be declared with any test. If more than one is declared, all must be met to run the test, otherwise it gets marked as UNSUPPORTED. For example, the test/DebugInfo/2010-08-04-StackVariable.ll test could have the declarative part as ; REQUIRE: llc -mtriple=arm-apple-darwin    < /dev/null ; REQUIRE: llc -mtriple=x86_64-apple-darwin < /dev/null ; RUN: llc -O0 -mtriple=arm-apple-darwin    < %s | grep DW_OP_fbreg ; RUN: llc -O0 -mtriple=x86_64-apple-darwin < %s | grep DW_OP_fbreg ; Use DW_OP_fbreg in variable's location expression if the...
2013 Jan 21
2
[LLVMdev] [llvm-commits] [llvm] r172534 - /llvm/trunk/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll
...21, 2013 at 11:49 AM, Andrew Trick <atrick at apple.com> wrote: > Moving to llvmdev... > > On Jan 21, 2013, at 11:37 AM, Nadav Rotem <nrotem at apple.com> wrote: > > > Hi Manish, > > > > Thank you for looking at this. Recently opt started using the "-mtriple" command line flag to initialize the TargetMachine for IR-level transformations that use it. Currently only the following passes are using this feature: LSR, LowerSwitch, BBVectorizer and LoopVectorizer. If you look at the tests in LoopVectorize you will see that the target-dependent tests are...
2012 Mar 02
2
[LLVMdev] "-march" trashing ARM triple
ARM subtarget features are determined by parsing the target tuple string TT. (ParseARMTriple(StringRef TT) in ARMMCTargetDesc.cpp) In llc, the -march setting overrides the architecture specified in -mtriple. So when you invoke: $ llc -march arm -mtriple armv7-none-linux ... ParseARMTriple() will see TT == "arm-none-linux" instead of "armv7-none-linux". As a result, t...
2017 Jul 06
2
MSP430 code generation from LLVM IR
...> wrote: > Luís, try using the -no-integrated-as flag to execute the assembler for > you. > We should probably make that the default for MSP430. > Cool. When I did that on macOS, LDC generated a lot of complaints, possibly because it is assuming mach-o files. I tried changing from -mtriple=msp430 to -mtriple=msp430-unknown-elf, to no avail. E.g.: $ ldc2 -mtriple=msp430-unknown-elf -c -no-integrated-as qosd.d ldc-ad1c8f0.s:3:11: error: mach-o section specifier requires a segment whose length is between 1 and 16 characters .section .text._D4qosd3fooFZi,"axG", at pro...
2013 Feb 11
1
[LLVMdev] x86 vs. i386 in clang ang llvm
...with regard to the use of x86 and i386 in clang and llvm tools. I'm using clang to emit llvm with –m32 on a x86-64 machine. This generates a file with a target triple that uses i386. >From the i386 llvm file I generate a .bc file with llvm-as. When I try to generate an object file with llc -mtriple x86 -filetype=obj I get the following error: llc: target does not support generation of this file type! When I specify -mtriple x86_64 instead, this works. Why can't i386 files be compiled to x64 objects files? And how can I configure clang to emit x86 llvm files? Thanks. -------------- nex...
2014 Jul 22
2
[LLVMdev] [LLVMDev][3.5]: assertion failed in RuntimeDyldELF.cpp
...ertions like ******************** FAIL: LLVM :: ExecutionEngine/MCJIT/test-setcond-fp.ll (6185 of 11245) ******************** TEST 'LLVM :: ExecutionEngine/MCJIT/test-setcond-fp.ll' FAILED ******************** Script: -- /cygdrive/z/dev/llvm/x64/static/Release+Asserts/bin/lli -use-mcjit -mtriple=x86_64-unknown-cygwin-elf /cygdrive/z/dev/llvm/x64/llvm/test/ExecutionEngine/MCJIT/test-setcond-fp.ll > /dev/null -- Exit Code: 134 Command Output (stderr): -- assertion "RealOffset <= INT32_MAX && RealOffset >= INT32_MIN" failed: file "/cygdrive/z/dev/llvm/x64...
2014 Jul 25
2
[LLVMdev] [LLVMDev][3.5]: assertion failed in RuntimeDyldELF.cpp
...cutionEngine/MCJIT/test-setcond-fp.ll (6185 of 11245) > ******************** TEST 'LLVM :: > ExecutionEngine/MCJIT/test-setcond-fp.ll' FAILED ******************** > Script: > -- > /cygdrive/z/dev/llvm/x64/static/Release+Asserts/bin/lli -use-mcjit > -mtriple=x86_64-unknown-cygwin-elf > /cygdrive/z/dev/llvm/x64/llvm/test/ExecutionEngine/MCJIT/test-setcond-fp.ll > > /dev/null > -- > Exit Code: 134 > > Command Output (stderr): > -- > assertion "RealOffset <= INT32_MAX && RealOffset &gt...
2012 Mar 02
0
[LLVMdev] "-march" trashing ARM triple
On Mar 2, 2012, at 12:04 AM, David Meyer <pdox at google.com> wrote: > ARM subtarget features are determined by parsing the target tuple string TT. (ParseARMTriple(StringRef TT) in ARMMCTargetDesc.cpp) > > In llc, the -march setting overrides the architecture specified in -mtriple. So when you invoke: > > $ llc -march arm -mtriple armv7-none-linux ... > > ParseARMTriple() will see TT == "arm-none-linux" instead of "armv7-no...
2012 Dec 31
3
[LLVMdev] Trying out Loop Vectorizer
...et-specific bits to estimate the cost of vectorization. I think that this is a good opportunity to discuss this topic. At the moment 'opt' does not use the triple that is found in the module in order to initialize the backend and the backend related analysis passes. It relies on the '-mtriple' command line flag. LLC on the other hand uses the host triple. I see the following options: 1. 'opt' does not initialize the backend passes unless '-mtriple' is used. (the current option) 2. 'opt' grabs the triple from the bit code file and uses it to initialize the ba...
2015 Jul 23
2
[LLVMdev] lli supports different targets than llc?
Hi, Is it normal/expected for `llc` to support a different set of targets than `lli`? I have a hello.ll on which this works: $ llc -mtriple=armv7a-linux-gnueabihf hello.ll # OK, generates hello.s But this doesn't: $ lli -mtriple=armv7a-linux-gnueabihf hello.ll # lli: error creating EE: No available targets are compatible with this triple, see -version for the available targets. I'm using LLVM from the git mirror: $ lli -ver...
2013 Jan 08
0
[LLVMdev] [cfe-dev] ARM failures
...rts build > it might not.) All these tests fail with 'illegal instruction' signal. For example: ******************** TEST 'LLVM :: ExecutionEngine/MCJIT/2003-01-04-ArgumentBug.ll' FAILED ******************** Script: -- /home/grib/clang/llvm-build-armhf/Release+Asserts/bin/lli -mtriple=armv7l-unknown-linux-gnueabihf -use-mcjit /home/grib/clang/llvm/test/ExecutionEngine/MCJIT/2003-01-04-ArgumentBug.ll > /dev/null -- Exit Code: 132 Command Output (stderr): -- Stack dump: 0. Program arguments: /home/grib/clang/llvm-build-armhf/Release+Asserts/bin/lli -mtriple=armv7l-unknown-...
2012 Nov 08
2
[LLVMdev] fmac generation for cortex-a9
Hi Anitha, Thanks for your answer but -mcpu=cortex-a9 -mattr=+vfp4 doesn' t enable fused mac generation for me. I would like just to understand why -mtriple=armv7-eabi enables it while -mcpu=cortex-a9 seems to disable it ? Seb > -----Original Message----- > From: Anitha Boyapati [mailto:anitha.boyapati at gmail.com] > Sent: Thursday, November 08, 2012 10:22 AM > To: Sebastien DELDON-GNB > Cc: llvmdev at cs.uiuc.edu > Subject: Re: [L...
2012 Nov 09
2
[LLVMdev] fmac generation for cortex-a9
Hi Bastien, Weird gcc is generating fma for my platform STEricsson Novathor with Linaro, code works. It also works when I use LLVM to generate fma (using llc -mtriple=armv7-eabi). Maybe someone from ARM can answer the question ? Seb From: JF Bastien [mailto:jfb at google.com] Sent: Friday, November 09, 2012 5:36 PM To: Sebastien DELDON-GNB Cc: Anitha Boyapati; llvmdev at cs.uiuc.edu Subject: Re: [LLVMdev] fmac generation for cortex-a9 AFAIK A9 doesn't hav...
2017 Jul 06
2
MSP430 code generation from LLVM IR
...hover at gmail.com> wrote: > On 5 July 2017 at 17:51, Luís Marques via llvm-dev > <llvm-dev at lists.llvm.org> wrote: > > Cool. When I did that on macOS, LDC generated a lot of complaints, > possibly > > because it is assuming mach-o files. I tried changing from > -mtriple=msp430 > > to -mtriple=msp430-unknown-elf, to no avail. E.g.: > > Clang has a bunch of complicated logic to find the correct assembler > if it's installed (in this case I'd expect "msp430-unknown-elf-as"). > It's quite possible LDC doesn't have this since...
2012 Nov 09
2
[LLVMdev] fmac generation for cortex-a9
...1, Sebastien DELDON-GNB > <sebastien.deldon at st.com> wrote: > > Hi Bastien, > > > > > > > > Weird gcc is generating fma for my platform STEricsson Novathor with > > Linaro, code works. It also works when I use LLVM to generate fma > > (using llc -mtriple=armv7-eabi). Maybe someone from ARM can answer > the question ? > > > > > > > > Seb > > > > > > > > From: JF Bastien [mailto:jfb at google.com] > > Sent: Friday, November 09, 2012 5:36 PM > > To: Sebastien DELDON-GNB > > Cc: Anith...
2014 Apr 24
2
[LLVMdev] Regression in 3.4's register allocator?
...;t seen before. Nothing has changed in our bitcode generator. I have attached an IR file which can be used to reproduce this problem. The problem occurs with -O2 and -disable-fp-elim specified. Running llc from 3.3 works without problems: $ ~/Downloads/clang+llvm-3.3-x86_64-apple-darwin12/bin/llc -mtriple i386-unknown-macosx -O2 -disable-fp-elim reg-alloc-test.ll While llc from 3.4 fails: $ ~/Downloads/clang+llvm-3.4-x86_64-apple-darwin10.9/bin/llc -mtriple i386-unknown-macosx -O2 -disable-fp-elim reg-alloc-test.ll LLVM ERROR: ran out of registers during register allocation I haven't been able...
2011 Mar 16
1
[LLVMdev] LLVM 2.9 RC1 Pre-release Tarballs
...M :: CodeGen/X86/fold-pcmpeqd-0.ll (2396 of 5848) > ******************** TEST 'LLVM :: CodeGen/X86/fold-pcmpeqd-0.ll' FAILED ******************** > Script: > -- > /media/dh0/llvm-2.9-build-O0/Release+Asserts/bin/llc < /media/dh0/llvm-2.9rc1/test/CodeGen/X86/fold-pcmpeqd-0.ll -mtriple=i386-apple-darwin | grep pcmpeqd | /media/dh0/llvm-2.9-build-O0/Release+Asserts/bin/count 1 > /media/dh0/llvm-2.9-build-O0/Release+Asserts/bin/llc < /media/dh0/llvm-2.9rc1/test/CodeGen/X86/fold-pcmpeqd-0.ll -mtriple=x86_64-apple-darwin | grep pcmpeqd | /media/dh0/llvm-2.9-build-O0/Release+Ass...