Displaying 6 results from an estimated 6 matches for "mtlo".
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2013 Oct 08
0
[LLVMdev] Subregister liveness tracking
...t think making
mthi/lo clobber the other half would work.
For example, this is an illegal sequence of instructions, where instruction
3 makes $hi unpredictable:
1. mult $lo<def>, $hi<def>, $2, $3 // $lo<def>, $hi<def> = $2 * $3
2. mflo $4, $lo<use> // $4 <- $lo
3. mtlo $lo<def>, $6 // $lo <- $6. effectively clobbers $hi too.
4. mfhi $5, $hi<use> // $5 <- $hi
5. mthi $hi<def>, $7 // $hi <- $7
6. madd $lo<def>, $hi<def>, $8, $9, $lo<use>, $hi<use> // $lo<def>,
$hi<def> = $2 * $3 + (lo,hi)
Unlike the mt...
2013 Oct 09
4
[LLVMdev] Subregister liveness tracking
...rent RA framework I think.
>
> For example, this is an illegal sequence of instructions, where instruction 3 makes $hi unpredictable:
>
> 1. mult $lo<def>, $hi<def>, $2, $3 // $lo<def>, $hi<def> = $2 * $3
> 2. mflo $4, $lo<use> // $4 <- $lo
> 3. mtlo $lo<def>, $6 // $lo <- $6. effectively clobbers $hi too.
> 4. mfhi $5, $hi<use> // $5 <- $hi
> 5. mthi $hi<def>, $7 // $hi <- $7
> 6. madd $lo<def>, $hi<def>, $8, $9, $lo<use>, $hi<use> // $lo<def>, $hi<def> = $2 * $3 + (lo,hi)...
2013 Oct 08
2
[LLVMdev] Subregister liveness tracking
Currently it will always spill / restore the whole vreg but only
spilling the parts that are actually live would be a nice addition in
the future.
Looking at r192119': if "mtlo" writes to $LO and sets $HI to an
unpredictable value, then it should just have an additional (dead) def
operand for $hi, shouldn't it?
Greetings
Matthias
Am 10/8/13, 11:03 AM, schrieb Akira Hatanaka:
> Hi,
>
> I have a question about the way sub-registers are spilled and...
2013 Mar 25
3
[LLVMdev] [PATCH] RegScavenger::scavengeRegister
...mporary integer GPR that
is used during pseudo-expansion.
This is what happens during pseudo-expansion:
The following pseudo
LoadAC $acc, FI // Pseudo load instructions. Load from FI to accumulator
$acc.
is expanded into this sequence:
LW $reg, FI // load from FI to temporary GPR $reg
MTLO $reg // copy $reg to register LO
LW $reg, FI + 4 // load from FI+4 to GPR $reg
MTHI $reg // copy $reg to register HI
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2013 Mar 25
0
[LLVMdev] [PATCH] RegScavenger::scavengeRegister
...t;
> This is what happens during pseudo-expansion:
>
> The following pseudo
>
> LoadAC $acc, FI // Pseudo load instructions. Load from FI to accumulator $acc.
>
>
> is expanded into this sequence:
>
> LW $reg, FI // load from FI to temporary GPR $reg
> MTLO $reg // copy $reg to register LO
> LW $reg, FI + 4 // load from FI+4 to GPR $reg
> MTHI $reg // copy $reg to register HI
Hi Akira,
The register scavenger is not really supposed to be used in more than one pass, because you would need to allocate a separate emergency spill...
2013 Mar 25
3
[LLVMdev] [PATCH] RegScavenger::scavengeRegister
...ion:
> >
> > The following pseudo
> >
> > LoadAC $acc, FI // Pseudo load instructions. Load from FI to accumulator
> $acc.
> >
> >
> > is expanded into this sequence:
> >
> > LW $reg, FI // load from FI to temporary GPR $reg
> > MTLO $reg // copy $reg to register LO
> > LW $reg, FI + 4 // load from FI+4 to GPR $reg
> > MTHI $reg // copy $reg to register HI
>
> Hi Akira,
>
> The register scavenger is not really supposed to be used in more than one
> pass, because you would need to al...