Displaying 4 results from an estimated 4 matches for "msrmask".
Did you mean:
msr_mask
2013 Jul 17
2
[LLVMdev] Help with subtarget features and context-dependent asm parsers
...mrs r8, apsr
^
<stdin>:1357:9: error: instruction requires: armv7m
mrs r8, cpsr
^
<stdin>:1358:9: error: instruction requires: armv7m
mrs r8, spsr
^
and the second was the same for basic-arm-instructions.s. The problem seems
to be that the MSRMask parser is then always used, even for non-M-class.
Richard
2013 Jul 17
0
[LLVMdev] Help with subtarget features and context-dependent asm parsers
> /tmp/foo.s:1:2: error: instruction requires: distinct-ops
> sllk %r2,%r3,1
> ^
That seems like it would be a good improvement for all targets.
> ARM seems to rely on the current MatchOperandParserImpl() behaviour,
> so I'm not going to suggest changing it unconditionally.
Presumably you switched it and looked at what fell over; do you
remember what kind
2013 Jul 17
0
[LLVMdev] Help with subtarget features and context-dependent asm parsers
...>:1357:9: error: instruction requires: armv7m
> mrs r8, cpsr
> ^
> <stdin>:1358:9: error: instruction requires: armv7m
> mrs r8, spsr
> ^
>
> and the second was the same for basic-arm-instructions.s. The problem seems
> to be that the MSRMask parser is then always used, even for non-M-class.
This seems fixable. The custom parsers that are only valid for certain sub targets could easily have an explicit early-exit if the active sub target isn't what it's looking for. Would that be sufficient here?
-Jim
2013 Jul 17
2
[LLVMdev] Help with subtarget features and context-dependent asm parsers
I'm trying to add some instructions that are only available on certain
processors. These instructions use context-dependent parsers. Everything
works fine for the valid cases, but if you try to use an instruction on
processors that don't support it, the asm parser says:
/tmp/foo.s:1:2: error: invalid operands for instruction
sllk %r2,%r3,1
^
rather than: