Displaying 1 result from an estimated 1 matches for "msr_f10_bu_cfg2".
2013 Jan 17
0
[PATCH v2] AMD: Enable WC+ memory type on family 10 processors
..._bit(X86_FEATURE_ARAT, c->x86_capability);
/*
+ * On family 10h BIOS may not have properly enabled WC+ support, causing
+ * it to be converted to CD memtype. This may result in performance
+ * degradation for certain nested-paging guests. Prevent this conversion
+ * by clearing bit 24 in MSR_F10_BU_CFG2.
+ */
+ if (c->x86 == 0x10) {
+ rdmsrl(MSR_F10_BU_CFG2, value);
+ value &= ~(1ULL << 24);
+ wrmsrl(MSR_F10_BU_CFG2, value);
+ }
+
+ /*
* Prior to Family 0x14, perf counters are not reset during warm reboot.
* We have to reset them manually.
*/
diff -r b6195e277da5 -r 40881...