search for: msr_core_perf_global_ctrl

Displaying 5 results from an estimated 5 matches for "msr_core_perf_global_ctrl".

[PATCH] Enable Core 2 Duo Performance Counters in HVM guest
2007 Dec 11
13
[PATCH] Enable Core 2 Duo Performance Counters in HVM guest
Hi, Keir, Currently, HVM guests do not have access to performance counters. So it is not possible to use performance analyzer software such as vtune in HVM guest to analyze programme performance. Other usage of performance counters , for example, the NMI watchdog, won''t function either. This patch will enable performance counters in HVM guest. Currently, only Core 2 Duo is implemented.
[PATCH] Clean up x86 control register and MSR macros (corrected)
2007 Apr 18
2
[PATCH] Clean up x86 control register and MSR macros (corrected)
...00003b1 + +/* Intel Core-based CPU performance counters */ +#define MSR_CORE_PERF_FIXED_CTR0 0x00000309 +#define MSR_CORE_PERF_FIXED_CTR1 0x0000030a +#define MSR_CORE_PERF_FIXED_CTR2 0x0000030b +#define MSR_CORE_PERF_FIXED_CTR_CTRL 0x0000038d +#define MSR_CORE_PERF_GLOBAL_STATUS 0x0000038e +#define MSR_CORE_PERF_GLOBAL_CTRL 0x0000038f +#define MSR_CORE_PERF_GLOBAL_OVF_CTRL 0x00000390 + +/* Geode defined MSRs */ +#define MSR_GEODE_BUSCONT_CONF0 0x00001900 + +#endif /* __ASM_MSR_INDEX_H */ diff -urN --exclude='o.*' --exclude '*~' stock/linux-2.6.21-rc6-mm1/include/asm-i386/msr.h linux-2.6.21-rc6-mm1/inc...
[PATCH] Clean up x86 control register and MSR macros (corrected)
2007 Apr 18
2
[PATCH] Clean up x86 control register and MSR macros (corrected)
...00003b1 + +/* Intel Core-based CPU performance counters */ +#define MSR_CORE_PERF_FIXED_CTR0 0x00000309 +#define MSR_CORE_PERF_FIXED_CTR1 0x0000030a +#define MSR_CORE_PERF_FIXED_CTR2 0x0000030b +#define MSR_CORE_PERF_FIXED_CTR_CTRL 0x0000038d +#define MSR_CORE_PERF_GLOBAL_STATUS 0x0000038e +#define MSR_CORE_PERF_GLOBAL_CTRL 0x0000038f +#define MSR_CORE_PERF_GLOBAL_OVF_CTRL 0x00000390 + +/* Geode defined MSRs */ +#define MSR_GEODE_BUSCONT_CONF0 0x00001900 + +#endif /* __ASM_MSR_INDEX_H */ diff -urN --exclude='o.*' --exclude '*~' stock/linux-2.6.21-rc6-mm1/include/asm-i386/msr.h linux-2.6.21-rc6-mm1/inc...
No subject
2007 Apr 18
1
No subject
...00003b1 + +/* Intel Core-based CPU performance counters */ +#define MSR_CORE_PERF_FIXED_CTR0 0x00000309 +#define MSR_CORE_PERF_FIXED_CTR1 0x0000030a +#define MSR_CORE_PERF_FIXED_CTR2 0x0000030b +#define MSR_CORE_PERF_FIXED_CTR_CTRL 0x0000038d +#define MSR_CORE_PERF_GLOBAL_STATUS 0x0000038e +#define MSR_CORE_PERF_GLOBAL_CTRL 0x0000038f +#define MSR_CORE_PERF_GLOBAL_OVF_CTRL 0x00000390 + +/* Geode defined MSRs */ +#define MSR_GEODE_BUSCONT_CONF0 0x00001900 + +#endif /* __ASM_MSR_INDEX_H */ diff -urN --exclude='o.*' stock/linux-2.6.21-rc6-mm1/include/asm-i386/msr.h linux-2.6.21-rc6-mm1/include/asm-i386/msr.h ---...
No subject
2007 Apr 18
1
No subject
...00003b1 + +/* Intel Core-based CPU performance counters */ +#define MSR_CORE_PERF_FIXED_CTR0 0x00000309 +#define MSR_CORE_PERF_FIXED_CTR1 0x0000030a +#define MSR_CORE_PERF_FIXED_CTR2 0x0000030b +#define MSR_CORE_PERF_FIXED_CTR_CTRL 0x0000038d +#define MSR_CORE_PERF_GLOBAL_STATUS 0x0000038e +#define MSR_CORE_PERF_GLOBAL_CTRL 0x0000038f +#define MSR_CORE_PERF_GLOBAL_OVF_CTRL 0x00000390 + +/* Geode defined MSRs */ +#define MSR_GEODE_BUSCONT_CONF0 0x00001900 + +#endif /* __ASM_MSR_INDEX_H */ diff -urN --exclude='o.*' stock/linux-2.6.21-rc6-mm1/include/asm-i386/msr.h linux-2.6.21-rc6-mm1/include/asm-i386/msr.h ---...