search for: msppp

...*); - int (*me )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*mpeg )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*msenc )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*mspdec )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*msppp )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*msvld )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*pm )(struct nvkm_device *, int idx, struct nvkm_pm **); - int (*sec )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*sw )(struct nvkm_...

...*); - int (*me )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*mpeg )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*msenc )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*mspdec )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*msppp )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*msvld )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*pm )(struct nvkm_device *, int idx, struct nvkm_pm **); - int (*sec )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*sw )(struct nvkm_...

...eau 0000:01:00.0: fifo:000004:04[ ce0]: 00000000: busy 0 faulted 0 chsw 0 save 0 load 0 chid 0 -> chid 0 [ 1696.780529] nouveau 0000:01:00.0: fifo:000001:01[ mspdec]: 00000000: busy 0 faulted 0 chsw 0 save 0 load 0 chid 0 -> chid 0 [ 1696.780581] nouveau 0000:01:00.0: fifo:000002:02[ msppp]: 00000000: busy 0 faulted 0 chsw 0 save 0 load 0 chid 0 -> chid 0 [ 1696.780633] nouveau 0000:01:00.0: fifo:000003:03[ msvld]: 00000000: busy 0 faulted 0 chsw 0 save 0 load 0 chid 0 -> chid 0 [ 1696.780689] nouveau 0000:01:00.0: fifo:000000:00[ gr]: 8006e005: busy 1 faulted 0 chsw 1...

...:01:00.0: fifo:000004:04[ ce0]: 00000000: busy 0 faulted 0 chsw 0 save 0 load 0 chid 0 -> chid 0 > [ 1696.780529] nouveau 0000:01:00.0: fifo:000001:01[ mspdec]: 00000000: busy 0 faulted 0 chsw 0 save 0 load 0 chid 0 -> chid 0 > [ 1696.780581] nouveau 0000:01:00.0: fifo:000002:02[ msppp]: 00000000: busy 0 faulted 0 chsw 0 save 0 load 0 chid 0 -> chid 0 > [ 1696.780633] nouveau 0000:01:00.0: fifo:000003:03[ msvld]: 00000000: busy 0 faulted 0 chsw 0 save 0 load 0 chid 0 -> chid 0 > [ 1696.780689] nouveau 0000:01:00.0: fifo:000000:00[ gr]: 8006e005: busy 1 faulted...

...*); - int (*me )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*mpeg )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*msenc )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*mspdec )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*msppp )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*msvld )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*pm )(struct nvkm_device *, int idx, struct nvkm_pm **); - int (*sec )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*sw )(struct nvkm_...

The INA3221 is usually found on mid and high end kepler+ gpus Marins Patch implements the new iccsense subdev and all needed bits for the INA3221 power sensor. My Patch implements the hwmon power1 interface to expose the current power consumption through hwmon (and can be read out via sysfs or the sensors tool) Please test these patches for Fermi+ GPUs, that nothing gets messed up and works as

This is a complete rework from the first version I sent out. Now the implementation is more centered around the power_rails we find in the SENSE table instead of extdev centered. This makes the implementation a lot easier and straightforward. I've added support for the INA219, INA209 and INA3221 sensors found on multiple Fermi and Kepler cards. The power consumption is also exported via

This is a complete rework from the last version I sent out. Now the implementation is more centered around the power_rails we find in the SENSE table instead of extdev centered. This makes the implementation a lot easier and straightforward. I've added support for the INA219, INA209 and INA3221 sensors found on multiple Fermi and Kepler cards, but only the INA3221 bits are tested so far.

...FIFO engines we somehow missed on Fermi+? There's apparently a new VIC class (0xa0b6), but I've never seen a VIC other than the MCP89 one (0x86b6). AFAICS there's also one unknown enum value in NVRM's FIFO engine enum... (I know of GRAPH, CE0, CE1, CE2, VP1/VP2/MSPDEC, MSRCH/ME, MSPPP, BSP/MSVLD/MSDEC, MPEG, SOFTWARE, CIPHER/SEC, VIC, MSENC). > >> Curiously, a GF116 card that I thought was working fine on nouveau >> actually has 3 for the first engine and 4 for the second. Perhaps it >> just had enough VRAM that I never triggered the conditions required &g...

This is a complete rework from the first version I sent out. Now the implementation is more centered around the power_rails we find in the SENSE table instead of extdev centered. This makes the implementation a lot easier and straightforward. I've added support for the INA219, INA209 and INA3221 sensors found on multiple Fermi and Kepler cards. The power consumption is also exported via

...this several times with several different kernels, always with the same result. It deadlocks wayland or X within seconds after opening a terminal or chrome. It starts out like this: [ 108.167312] nouveau 0000:01:00.0: fifo: SCHED_ERROR 0a [CTXSW_TIMEOUT] [ 108.167328] nouveau 0000:01:00.0: fifo: msppp engine fault on channel 12, recovering... [ 118.871915] nouveau 0000:01:00.0: multiqueue0:src[7039]: failed to idle channel 12 [multiqueue0:src[7039]] [ 133.873009] nouveau 0000:01:00.0: multiqueue0:src[7039]: failed to idle channel 12 [multiqueue0:src[7039]] [ 134.242698] nouveau 0000:01:00.0:...

This is a complete rework from the first version I sent out. Now the implementation is more centered around the power_rails we find in the SENSE table instead of extdev centered. This makes the implementation a lot easier and straightforward. I've added support for the INA219, INA209 and INA3221 sensors found on multiple Fermi and Kepler cards. The power consumption is also exported via

...nvkm/engine/gr.h | 2 +- drivers/gpu/drm/nouveau/include/nvkm/engine/mpeg.h | 2 +- drivers/gpu/drm/nouveau/include/nvkm/engine/msenc.h | 2 +- drivers/gpu/drm/nouveau/include/nvkm/engine/mspdec.h | 2 +- drivers/gpu/drm/nouveau/include/nvkm/engine/msppp.h | 2 +- drivers/gpu/drm/nouveau/include/nvkm/engine/msvld.h | 2 +- drivers/gpu/drm/nouveau/include/nvkm/engine/nvdec.h | 2 +- drivers/gpu/drm/nouveau/include/nvkm/engine/nvenc.h | 2 +- drivers/gpu/drm/nouveau/include/nvkm/engine/pm.h...

...er: GPL-2.0 */ include/nvkm/engine/gr.h:/* SPDX-License-Identifier: GPL-2.0 */ include/nvkm/engine/mpeg.h:/* SPDX-License-Identifier: GPL-2.0 */ include/nvkm/engine/msenc.h:/* SPDX-License-Identifier: GPL-2.0 */ include/nvkm/engine/mspdec.h:/* SPDX-License-Identifier: GPL-2.0 */ include/nvkm/engine/msppp.h:/* SPDX-License-Identifier: GPL-2.0 */ include/nvkm/engine/msvld.h:/* SPDX-License-Identifier: GPL-2.0 */ include/nvkm/engine/nvdec.h:/* SPDX-License-Identifier: GPL-2.0 */ include/nvkm/engine/nvenc.h:/* SPDX-License-Identifier: GPL-2.0 */ include/nvkm/engine/pm.h:/* SPDX-License-Identifier: GPL-...

On Mon, Nov 24, 2014 at 8:33 PM, Andy Ritger <aritger at nvidia.com> wrote: > On Fri, Nov 21, 2014 at 01:39:55AM -0500, Ilia Mirkin wrote: >> On Fri, Nov 21, 2014 at 1:16 AM, Andy Ritger <aritger at nvidia.com> wrote: >> > Hi Ilia, >> > >> > Actually 0x90b8 is different than copy engine. I'm not very familiar >> > with it, but 0x90b8 is

...May 21 14:41:27 kernel: ---[ end trace c64308a1ea709e90 ]--- May 21 14:41:27 kernel: nouveau 0000:01:00.0: fifo: channel 4 [mpv/vo[5662]] kick timeout May 21 14:41:27 kernel: nouveau 0000:01:00.0: fifo: INTR 00010000: 00000002 May 21 14:41:27 kernel: nouveau: mpv/vo[5662]:00000000:0000906f: detach msppp failed, -110 May 21 14:41:27 kernel: nouveau 0000:01:00.0: fifo: INTR 00010000: 00000002 [...] and so on. Machine can be gracefully shut down, though it takes a while. Other than that it becomes almost unusable due to high CPU usage by Xorg. -- You are receiving this mail because: You are the as...

https://bugs.freedesktop.org/show_bug.cgi?id=95251 Bug ID: 95251 Summary: vdpau decoder capabilities: not supported Product: Mesa Version: 11.2 Hardware: Other OS: All Status: NEW Severity: normal Priority: medium Component: Drivers/DRI/nouveau Assignee: nouveau at