search for: mspdec

...*); - int (*ifb )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*me )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*mpeg )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*msenc )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*mspdec )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*msppp )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*msvld )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*pm )(struct nvkm_device *, int idx, struct nvkm_pm **); - int (*sec )(struct nvkm_d...

...*); - int (*ifb )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*me )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*mpeg )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*msenc )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*mspdec )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*msppp )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*msvld )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*pm )(struct nvkm_device *, int idx, struct nvkm_pm **); - int (*sec )(struct nvkm_d...

...engine fault on channel 12, recovering... [ 118.871915] nouveau 0000:01:00.0: multiqueue0:src[7039]: failed to idle channel 12 [multiqueue0:src[7039]] [ 133.873009] nouveau 0000:01:00.0: multiqueue0:src[7039]: failed to idle channel 12 [multiqueue0:src[7039]] [ 134.242698] nouveau 0000:01:00.0: mspdec: intr 028c0000 [ 134.242744] nouveau 0000:01:00.0: bus: MMIO read of 00000000 FAULT at 084048 [ IBUS ] [ 138.538241] nouveau 0000:01:00.0: fifo: SCHED_ERROR 0a [CTXSW_TIMEOUT] [ 138.538259] nouveau 0000:01:00.0: fifo: mspdec engine fault on channel 12, recovering... [ 140.537498] nouveau 0000:0...

...veau 0000:01:00.0: fifo:000000:07[ ce2]: 00050005: busy 0 faulted 0 chsw 0 save 0 load 0 chid 5 -> chid 5 [ 1696.780476] nouveau 0000:01:00.0: fifo:000004:04[ ce0]: 00000000: busy 0 faulted 0 chsw 0 save 0 load 0 chid 0 -> chid 0 [ 1696.780529] nouveau 0000:01:00.0: fifo:000001:01[ mspdec]: 00000000: busy 0 faulted 0 chsw 0 save 0 load 0 chid 0 -> chid 0 [ 1696.780581] nouveau 0000:01:00.0: fifo:000002:02[ msppp]: 00000000: busy 0 faulted 0 chsw 0 save 0 load 0 chid 0 -> chid 0 [ 1696.780633] nouveau 0000:01:00.0: fifo:000003:03[ msvld]: 00000000: busy 0 faulted 0 chsw 0...

...0:01:00.0: fifo:000000:07[ ce2]: 00050005: busy 0 faulted 0 chsw 0 save 0 load 0 chid 5 -> chid 5 > [ 1696.780476] nouveau 0000:01:00.0: fifo:000004:04[ ce0]: 00000000: busy 0 faulted 0 chsw 0 save 0 load 0 chid 0 -> chid 0 > [ 1696.780529] nouveau 0000:01:00.0: fifo:000001:01[ mspdec]: 00000000: busy 0 faulted 0 chsw 0 save 0 load 0 chid 0 -> chid 0 > [ 1696.780581] nouveau 0000:01:00.0: fifo:000002:02[ msppp]: 00000000: busy 0 faulted 0 chsw 0 save 0 load 0 chid 0 -> chid 0 > [ 1696.780633] nouveau 0000:01:00.0: fifo:000003:03[ msvld]: 00000000: busy 0 faulted...

...*); - int (*ifb )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*me )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*mpeg )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*msenc )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*mspdec )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*msppp )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*msvld )(struct nvkm_device *, int idx, struct nvkm_engine **); - int (*pm )(struct nvkm_device *, int idx, struct nvkm_pm **); - int (*sec )(struct nvkm_d...

The INA3221 is usually found on mid and high end kepler+ gpus Marins Patch implements the new iccsense subdev and all needed bits for the INA3221 power sensor. My Patch implements the hwmon power1 interface to expose the current power consumption through hwmon (and can be read out via sysfs or the sensors tool) Please test these patches for Fermi+ GPUs, that nothing gets messed up and works as

This is a complete rework from the first version I sent out. Now the implementation is more centered around the power_rails we find in the SENSE table instead of extdev centered. This makes the implementation a lot easier and straightforward. I've added support for the INA219, INA209 and INA3221 sensors found on multiple Fermi and Kepler cards. The power consumption is also exported via

This is a complete rework from the last version I sent out. Now the implementation is more centered around the power_rails we find in the SENSE table instead of extdev centered. This makes the implementation a lot easier and straightforward. I've added support for the INA219, INA209 and INA3221 sensors found on multiple Fermi and Kepler cards, but only the INA3221 bits are tested so far.

...re there any more FIFO engines we somehow missed on Fermi+? There's apparently a new VIC class (0xa0b6), but I've never seen a VIC other than the MCP89 one (0x86b6). AFAICS there's also one unknown enum value in NVRM's FIFO engine enum... (I know of GRAPH, CE0, CE1, CE2, VP1/VP2/MSPDEC, MSRCH/ME, MSPPP, BSP/MSVLD/MSDEC, MPEG, SOFTWARE, CIPHER/SEC, VIC, MSENC). > >> Curiously, a GF116 card that I thought was working fine on nouveau >> actually has 3 for the first engine and 4 for the second. Perhaps it >> just had enough VRAM that I never triggered the condi...

This is a complete rework from the first version I sent out. Now the implementation is more centered around the power_rails we find in the SENSE table instead of extdev centered. This makes the implementation a lot easier and straightforward. I've added support for the INA219, INA209 and INA3221 sensors found on multiple Fermi and Kepler cards. The power consumption is also exported via

This is a complete rework from the first version I sent out. Now the implementation is more centered around the power_rails we find in the SENSE table instead of extdev centered. This makes the implementation a lot easier and straightforward. I've added support for the INA219, INA209 and INA3221 sensors found on multiple Fermi and Kepler cards. The power consumption is also exported via

https://bugs.freedesktop.org/show_bug.cgi?id=75464 Priority: medium Bug ID: 75464 Assignee: nouveau at lists.freedesktop.org Summary: [nv4e] [vdpau] causes hangs QA Contact: xorg-team at lists.x.org Severity: normal Classification: Unclassified OS: All Reporter: ronald645 at gmail.com Hardware:

...nvkm/engine/fifo.h | 2 +- drivers/gpu/drm/nouveau/include/nvkm/engine/gr.h | 2 +- drivers/gpu/drm/nouveau/include/nvkm/engine/mpeg.h | 2 +- drivers/gpu/drm/nouveau/include/nvkm/engine/msenc.h | 2 +- drivers/gpu/drm/nouveau/include/nvkm/engine/mspdec.h | 2 +- drivers/gpu/drm/nouveau/include/nvkm/engine/msppp.h | 2 +- drivers/gpu/drm/nouveau/include/nvkm/engine/msvld.h | 2 +- drivers/gpu/drm/nouveau/include/nvkm/engine/nvdec.h | 2 +- drivers/gpu/drm/nouveau/include/nvkm/engine/nvenc.h...

...fier: GPL-2.0 */ include/nvkm/engine/fifo.h:/* SPDX-License-Identifier: GPL-2.0 */ include/nvkm/engine/gr.h:/* SPDX-License-Identifier: GPL-2.0 */ include/nvkm/engine/mpeg.h:/* SPDX-License-Identifier: GPL-2.0 */ include/nvkm/engine/msenc.h:/* SPDX-License-Identifier: GPL-2.0 */ include/nvkm/engine/mspdec.h:/* SPDX-License-Identifier: GPL-2.0 */ include/nvkm/engine/msppp.h:/* SPDX-License-Identifier: GPL-2.0 */ include/nvkm/engine/msvld.h:/* SPDX-License-Identifier: GPL-2.0 */ include/nvkm/engine/nvdec.h:/* SPDX-License-Identifier: GPL-2.0 */ include/nvkm/engine/nvenc.h:/* SPDX-License-Identifier: G...

On Mon, Nov 24, 2014 at 8:33 PM, Andy Ritger <aritger at nvidia.com> wrote: > On Fri, Nov 21, 2014 at 01:39:55AM -0500, Ilia Mirkin wrote: >> On Fri, Nov 21, 2014 at 1:16 AM, Andy Ritger <aritger at nvidia.com> wrote: >> > Hi Ilia, >> > >> > Actually 0x90b8 is different than copy engine. I'm not very familiar >> > with it, but 0x90b8 is

...May 21 14:41:25 kernel: nouveau 0000:01:00.0: fifo: INTR 00010000: 00000002 May 21 14:41:25 kernel: nouveau 0000:01:00.0: fifo: INTR 00010000: 00000002 May 21 14:41:25 kernel: nouveau 0000:01:00.0: fifo: INTR 00010000: 00000002 May 21 14:41:25 kernel: nouveau: mpv/vo[5662]:00000000:0000906f: detach mspdec failed, -110 May 21 14:41:25 kernel: nouveau 0000:01:00.0: fifo: INTR 00010000: 00000002 May 21 14:41:25 kernel: nouveau 0000:01:00.0: fifo: INTR 00010000: 00000002 May 21 14:41:25 kernel: nouveau 0000:01:00.0: fifo: INTR 00010000: 00000002 May 21 14:41:25 kernel: nouveau 0000:01:00.0: fifo: INTR 0...

https://bugs.freedesktop.org/show_bug.cgi?id=95251 Bug ID: 95251 Summary: vdpau decoder capabilities: not supported Product: Mesa Version: 11.2 Hardware: Other OS: All Status: NEW Severity: normal Priority: medium Component: Drivers/DRI/nouveau Assignee: nouveau at