search for: msixtbl_write

...andler error\n"); + if ( p->state == STATE_IOREQ_NONE ) vcpu_end_shutdown_deferral(curr); } diff --git a/xen/arch/x86/hvm/vmsi.c b/xen/arch/x86/hvm/vmsi.c index 4826b4a..2cdd0dc 100644 --- a/xen/arch/x86/hvm/vmsi.c +++ b/xen/arch/x86/hvm/vmsi.c @@ -293,7 +293,11 @@ static int msixtbl_write(struct vcpu *v, unsigned long address, /* exit to device model if address/data has been modified */ if ( test_and_clear_bit(nr_entry, &entry->table_flags) ) + { + v->arch.pending_msix_unmask.valid = 1; + v->arch.pending_msix_unmask.ctrl_address = address;...

...;); vcpu_end_shutdown_deferral(curr); + } } static int dpci_ioport_read(uint32_t mport, ioreq_t *p) diff --git a/xen/arch/x86/hvm/vmsi.c b/xen/arch/x86/hvm/vmsi.c index 4826b4a..7178de9 100644 --- a/xen/arch/x86/hvm/vmsi.c +++ b/xen/arch/x86/hvm/vmsi.c @@ -293,7 +293,10 @@ static int msixtbl_write(struct vcpu *v, unsigned long address, /* exit to device model if address/data has been modified */ if ( test_and_clear_bit(nr_entry, &entry->table_flags) ) + { + v->arch.pending_msix_unmask.ctrl_address = address; goto out; + } virt = msixtbl_addr_t...

...;& + desc->mask_base + PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET + == virt ) + return desc; + + return NULL; +} + static void __iomem *msixtbl_addr_to_virt( struct msixtbl_entry *entry, unsigned long addr) { @@ -247,13 +260,16 @@ out: } static int msixtbl_write(struct vcpu *v, unsigned long address, - unsigned long len, unsigned long val) + unsigned long len, unsigned long val) { unsigned long offset; struct msixtbl_entry *entry; + struct msi_desc *m_desc; void *virt; unsigned int nr_e...

Hi, I am curious to know why Xen disallows guest to change the mask bit of MSI-X vector control as show in the comment out section in msixtbl_write(). Our SR-IOV driver got driver reload failure because it cannot enable interrupt. /* Do not allow the mask bit to be changed. */ #if 0 /* XXX * As the mask bit is the only defined bit in the word, and as the * host MSI-X code doesn''t preserve the other bits anyway,...

...>= desc->mask_base && + virt < desc->mask_base + PCI_MSIX_ENTRY_SIZE ) + return desc; + + return NULL; +} + static void __iomem *msixtbl_addr_to_virt( struct msixtbl_entry *entry, unsigned long addr) { @@ -247,13 +260,16 @@ out: } static int msixtbl_write(struct vcpu *v, unsigned long address, - unsigned long len, unsigned long val) + unsigned long len, unsigned long val) { unsigned long offset; struct msixtbl_entry *entry; + const struct msi_desc *msi_desc; void *virt; unsigned...

What are the outstanding things to do before we think we can start on the 4.2 -rc''s? Does anyone have a timetable in mind? hypervisor: * ??? - Keir, Tim, Jan? tools: * libxl stable API -- we would like 4.2 to define a stable API which downstream''s can start to rely on not changing. Aspects of this are: * event handling (IanJ working