Displaying 5 results from an estimated 5 matches for "msi_addr_dest_id_shift".
2012 Oct 02
3
[PATCH] VT-d: make remap_entry_to_msi_msg() return consistent message
...4,11 @@ static int remap_entry_to_msi_msg(
MSI_ADDR_REDIRECTION_CPU:
MSI_ADDR_REDIRECTION_LOWPRI);
if ( x2apic_enabled )
+ {
msg->dest32 = iremap_entry->lo.dst;
+ msg->address_lo |=
+ (iremap_entry->lo.dst & 0xff) << MSI_ADDR_DEST_ID_SHIFT;
+ }
else
msg->address_lo |=
((iremap_entry->lo.dst >> 8) & 0xff ) << MSI_ADDR_DEST_ID_SHIFT;
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2009 Jun 05
1
[PATCHv3 07/13] qemu: minimal MSI/MSI-X implementation for PC
...PIC_WORDS 8
+/* Intel APIC constants: from include/asm/msidef.h */
+#define MSI_DATA_VECTOR_SHIFT 0
+#define MSI_DATA_VECTOR_MASK 0x000000ff
+#define MSI_DATA_DELIVERY_MODE_SHIFT 8
+#define MSI_DATA_TRIGGER_SHIFT 15
+#define MSI_DATA_LEVEL_SHIFT 14
+#define MSI_ADDR_DEST_MODE_SHIFT 2
+#define MSI_ADDR_DEST_ID_SHIFT 12
+#define MSI_ADDR_DEST_ID_MASK 0x00ffff0
+
+#define MSI_ADDR_BASE 0xfee00000
+#define MSI_ADDR_SIZE 0x100000
+
typedef struct APICState {
CPUState *cpu_env;
uint32_t apicbase;
@@ -712,11 +727,31 @@ static uint32_t apic_mem_readl(void *opaque, targ...
2009 Jun 05
1
[PATCHv3 07/13] qemu: minimal MSI/MSI-X implementation for PC
...PIC_WORDS 8
+/* Intel APIC constants: from include/asm/msidef.h */
+#define MSI_DATA_VECTOR_SHIFT 0
+#define MSI_DATA_VECTOR_MASK 0x000000ff
+#define MSI_DATA_DELIVERY_MODE_SHIFT 8
+#define MSI_DATA_TRIGGER_SHIFT 15
+#define MSI_DATA_LEVEL_SHIFT 14
+#define MSI_ADDR_DEST_MODE_SHIFT 2
+#define MSI_ADDR_DEST_ID_SHIFT 12
+#define MSI_ADDR_DEST_ID_MASK 0x00ffff0
+
+#define MSI_ADDR_BASE 0xfee00000
+#define MSI_ADDR_SIZE 0x100000
+
typedef struct APICState {
CPUState *cpu_env;
uint32_t apicbase;
@@ -712,11 +727,31 @@ static uint32_t apic_mem_readl(void *opaque, targ...
2009 May 20
9
[PATCH] qemu: msi irq allocation api
..._DM_SIPI 0x5
#define IOAPIC_DM_EXTINT 0x7
+/* Intel APIC constants: from include/asm/msidef.h */
+#define MSI_DATA_VECTOR_SHIFT 0
+#define MSI_DATA_VECTOR_MASK 0x000000ff
+#define MSI_DATA_DELIVERY_MODE_SHIFT 8
+#define MSI_ADDR_DEST_MODE_SHIFT 2
+#define MSI_DATA_TRIGGER_SHIFT 15
+#define MSI_ADDR_DEST_ID_SHIFT 12
+#define MSI_ADDR_DEST_ID_MASK 0x00ffff0
+#define MSI_DATA_LEVEL_SHIFT 14
+
struct IOAPICState {
uint8_t id;
uint8_t ioregsel;
@@ -51,6 +62,11 @@ struct IOAPICState {
uint64_t ioredtbl[IOAPIC_NUM_PINS];
};
+struct msi_state {
+ uint64_t addr;
+ uint32_t data;
+};
+
s...
2009 May 20
9
[PATCH] qemu: msi irq allocation api
..._DM_SIPI 0x5
#define IOAPIC_DM_EXTINT 0x7
+/* Intel APIC constants: from include/asm/msidef.h */
+#define MSI_DATA_VECTOR_SHIFT 0
+#define MSI_DATA_VECTOR_MASK 0x000000ff
+#define MSI_DATA_DELIVERY_MODE_SHIFT 8
+#define MSI_ADDR_DEST_MODE_SHIFT 2
+#define MSI_DATA_TRIGGER_SHIFT 15
+#define MSI_ADDR_DEST_ID_SHIFT 12
+#define MSI_ADDR_DEST_ID_MASK 0x00ffff0
+#define MSI_DATA_LEVEL_SHIFT 14
+
struct IOAPICState {
uint8_t id;
uint8_t ioregsel;
@@ -51,6 +62,11 @@ struct IOAPICState {
uint64_t ioredtbl[IOAPIC_NUM_PINS];
};
+struct msi_state {
+ uint64_t addr;
+ uint32_t data;
+};
+
s...