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...-mfpu=vfp -mlittle-endian -mfloat-abi=softfp -march=armv5 -S -O3 foo.c -S -o foo.s * Attached to this document foo.c and the resulting foo.s. Please, take note of the illegal instruction mul r0, r0, r2 at line 18. * The patch is discussed at: http://www.mail-archive.com/llvm-commits at cs.uiuc.edu/msg14069.html * llvm-gcc --version llvm-gcc (GCC) 4.2.1 (Based on Apple Inc. build 5658) (LLVM build) Copyright (C) 2007 Free Software Foundation, Inc. kind regards, Maarten Faddegon -------------- next part -------------- A non-text attachment was scrubbed... Name: foo.c Type: text/x-csrc Size: 77 bytes...

...n -mfloat-abi=softfp -march=armv5 -S > -O3 foo.c -S -o foo.s > * Attached to this document foo.c and the resulting foo.s. Please, take note of > the illegal instruction mul r0, r0, r2 at line 18. > * The patch is discussed at: > http://www.mail-archive.com/llvm-commits at cs.uiuc.edu/msg14069.html > * llvm-gcc --version > llvm-gcc (GCC) 4.2.1 (Based on Apple Inc. build 5658) (LLVM build) Copyright > (C) 2007 Free Software Foundation, Inc. If you read the Arm Architecture document for ARMv5, it states for MUL: "Operand restriction: Specifying the same register for <Rd...