Displaying 3 results from an estimated 3 matches for "msainst".
2016 Dec 03
2
Immediate operand for vector instructions
Hello.
I have problems specifying vector instructions with immediate values in TableGen.
I wrote the following specification (I got inspired from the MSA vector instructions
for the Mips back end):
class MSA_I16_FMT<bits<9> opcode>: MSAInst {
bits<16> s16;
let Inst{31-23} = opcode;
let Inst{26-11} = s16;
}
class REP_1R_DESC_BASE<,
InstrItinClass itin = NoItinerary> {
dag OutOperandList = (outs);
/* From include/llv...
2017 Feb 11
2
Specify special cases of delay slots in the back end
...nfo.cpp 2 more methods:
- CreateTargetPostRAHazardRecognizer() to register the
[Target]DispatchGroupSBHazardRecognizer()
- insertNoop() which returns the target's NOP
- note that my vector (and scalar) instructions are inspired from the Mips back
end, which has MSAInst (and MipsInst) with NoItinerary InstrItinClass. Currently I am not
using a [Target]Schedule.td specifying functional units, processor and instruction
itineraries. This might be a problem - I guess ScoreboardHazardRecognizer relies on this
information.
In principle, should I maybe use the p...
2017 Feb 10
2
Specify special cases of delay slots in the back end
Hello.
I am progressing a bit with difficulty with the post RA scheduler
(PostRASchedulerList.cpp with ScoreboardHazardRecognizer) - the problem I have is that it
doesn't advance at the next available instruction when the overridden
ScoreboardHazardRecognizer::getHazardType() method returns NoopHazard and it gets stuck at
the same instruction (store in my runs).
Just to make sure: